Well,
I'm not big guru of debugging.
I made following changes to mentioned part of code:
eModuleStatus cCamSlot::ModuleStatus(void)
{
cMutexLock MutexLock(&mutex);
eModuleStatus ms = ciAdapter ? ciAdapter->ModuleStatus(slotIndex) : msNone;
isyslog("ms: %d", ms); //AKO
isyslog("resetTime1: %d", resetTime); //AK
if (resetTime) {
isyslog("resetTime2: %d", resetTime); //AK
if (ms <= msReset) {
isyslog("resetTime3: %d", resetTime); //AK
if (time(NULL) - resetTime < MODULE_RESET_TIMEOUT)
isyslog("resetTime4: %d", resetTime); //AK
return msReset;
}
resetTime = 0;
}
return ms;
}
Log file attached. I suspect that additional instructions are welcome.
AK
Klaus Schmidinger wrote:
Looks like the lastModuleStatus for some reason falls back
to msReset.
Please dd some debug output to
cCamSlot::ModuleStatus() to see what's going on around
ciAdapter->ModuleStatus(slotIndex) and resetTime.
Maybe resetTime should be handled in milliseconds, using
a cTimeMs...
Apr 7 09:06:37 vdr vdr: [4862] cTimeMs: using monotonic clock (resolution is
4000250 ns)
Apr 7 09:06:37 vdr vdr: [4862] VDR version 1.6.0 started
Apr 7 09:06:37 vdr vdr: [4862] codeset is 'UTF-8' - known
Apr 7 09:06:37 vdr vdr: [4862] found 23 locales in
/usr/local/src/vdr-1.6.0/locale
Apr 7 09:06:37 vdr vdr: [4862] loading plugin:
/usr/local/src/vdr-1.6.0-vanilla/PLUGINS/lib/libvdr-xine.so.1.6.0
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/setup.conf
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/sources.conf
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/diseqc.conf
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/channels.conf
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/timers.conf
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/commands.conf
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/reccmds.conf
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/svdrphosts.conf
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/remote.conf
Apr 7 09:06:37 vdr vdr: [4862] loading /usr/local/etc/vdr/keymacros.conf
Apr 7 09:06:37 vdr vdr: [4863] video directory scanner thread started
(pid=4862, tid=4863)
Apr 7 09:06:37 vdr vdr: [4864] video directory scanner thread started
(pid=4862, tid=4864)
Apr 7 09:06:37 vdr vdr: [4862] reading EPG data from
/usr/local/etc/vdr/epg.data
Apr 7 09:06:37 vdr vdr: [4863] video directory scanner thread ended (pid=4862,
tid=4863)
Apr 7 09:06:37 vdr vdr: [4864] video directory scanner thread ended (pid=4862,
tid=4864)
Apr 7 09:06:38 vdr vdr: [4862] probing /dev/dvb/adapter0/frontend0
Apr 7 09:06:38 vdr vdr: [4866] tuner on device 1 thread started (pid=4862,
tid=4866)
Apr 7 09:06:38 vdr vdr: [4867] section handler thread started (pid=4862,
tid=4867)
Apr 7 09:06:38 vdr vdr: [4862] probing /dev/dvb/adapter1/frontend0
Apr 7 09:06:38 vdr vdr: [4869] CI adapter on device 1 thread started
(pid=4862, tid=4869)
Apr 7 09:06:38 vdr kernel: DVB: TDA10021(1): _tda10021_writereg, writereg
error (reg == 0x01, val == 0x6a, ret == -121)
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 1207548398
Apr 7 09:06:38 vdr vdr: [4869] resetTime2: 1207548398
Apr 7 09:06:38 vdr vdr: [4869] CAM 1: module present
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:38 vdr vdr: [4869] ms: 2
Apr 7 09:06:38 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:39 vdr vdr: [4869] ms: 2
Apr 7 09:06:39 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:39 vdr vdr: [4869] ms: 2
Apr 7 09:06:39 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:39 vdr kernel: dvb_ca adapter 1: DVB CAM detected and initialised
successfully
Apr 7 09:06:39 vdr vdr: [4869] ms: 3
Apr 7 09:06:39 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:39 vdr vdr: [4869] CAM 1: module ready
Apr 7 09:06:39 vdr vdr: [4869] ms: 3
Apr 7 09:06:39 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:39 vdr vdr: [4869] ms: 3
Apr 7 09:06:39 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:39 vdr vdr: [4869] ms: 3
Apr 7 09:06:39 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:39 vdr vdr: [4869] ms: 3
Apr 7 09:06:39 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:39 vdr vdr: [4869] ms: 3
Apr 7 09:06:39 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:39 vdr vdr: [4869] ms: 3
Apr 7 09:06:39 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4870] tuner on device 2 thread started (pid=4862,
tid=4870)
Apr 7 09:06:40 vdr vdr: [4871] section handler thread started (pid=4862,
tid=4871)
Apr 7 09:06:40 vdr vdr: [4862] found 2 video devices
Apr 7 09:06:40 vdr vdr: [4862] initializing plugin: xine (0.8.2): Software
based playback using xine
Apr 7 09:06:40 vdr vdr: [4872] XineRemote control thread started (pid=4862,
tid=4872)
Apr 7 09:06:40 vdr vdr: [4872] Entering cXineRemote thread
Apr 7 09:06:40 vdr vdr: [4862] setting primary device to 3
Apr 7 09:06:40 vdr vdr: [4862] assuming manual start of VDR
Apr 7 09:06:40 vdr vdr: [4862] SVDRP listening on port 2001
Apr 7 09:06:40 vdr vdr: [4862] starting plugin: xine
Apr 7 09:06:40 vdr vdr: [4862] skin "soppalusikka" not available - using
"classic" instead
Apr 7 09:06:40 vdr vdr: [4875] KBD remote control thread started (pid=4862,
tid=4875)
Apr 7 09:06:40 vdr vdr: [4862] ERROR: remote control XineRemote not ready!
Apr 7 09:06:40 vdr vdr: [4862] remote control KBD - keys known
Apr 7 09:06:40 vdr vdr: [4862] ms: 3
Apr 7 09:06:40 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4862] ms: 3
Apr 7 09:06:40 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4862] ms: 3
Apr 7 09:06:40 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4862] ms: 3
Apr 7 09:06:40 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4862] ms: 3
Apr 7 09:06:40 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4862] ms: 3
Apr 7 09:06:40 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4862] ms: 3
Apr 7 09:06:40 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4862] ms: 3
Apr 7 09:06:40 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:40 vdr vdr: [4869] ms: 3
Apr 7 09:06:40 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4862] ms: 3
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4869] ms: 3
Apr 7 09:06:41 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4862] ms: 3
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4869] ms: 3
Apr 7 09:06:41 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4862] ms: 3
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4869] ms: 3
Apr 7 09:06:41 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4862] ms: 3
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4869] ms: 3
Apr 7 09:06:41 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4862] ms: 3
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4869] ms: 3
Apr 7 09:06:41 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4862] ms: 3
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4869] ms: 3
Apr 7 09:06:41 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4862] ms: 3
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4862] ms: 2
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 1207548401
Apr 7 09:06:41 vdr vdr: [4862] resetTime2: 1207548401
Apr 7 09:06:41 vdr vdr: [4869] ms: 2
Apr 7 09:06:41 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4869] CAM 1: module present
Apr 7 09:06:41 vdr vdr: [4862] ms: 2
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4869] ms: 2
Apr 7 09:06:41 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4862] ms: 2
Apr 7 09:06:41 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:41 vdr vdr: [4869] ms: 2
Apr 7 09:06:41 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4862] ms: 2
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4869] ms: 2
Apr 7 09:06:42 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4862] ms: 2
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4869] ms: 2
Apr 7 09:06:42 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4862] ms: 2
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4869] ms: 2
Apr 7 09:06:42 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4862] ms: 2
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4869] ms: 2
Apr 7 09:06:42 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4862] ms: 2
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4869] ms: 2
Apr 7 09:06:42 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4862] ms: 2
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4869] ms: 2
Apr 7 09:06:42 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4862] ms: 2
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4869] ms: 2
Apr 7 09:06:42 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4862] ms: 2
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4869] ms: 2
Apr 7 09:06:42 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4862] ms: 2
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:42 vdr vdr: [4869] ms: 2
Apr 7 09:06:42 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:42 vdr kernel: dvb_ca adapter 1: DVB CAM detected and initialised
successfully
Apr 7 09:06:42 vdr vdr: [4862] ms: 3
Apr 7 09:06:42 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] CAM 1: module ready
Apr 7 09:06:43 vdr vdr: [4862] ms: 3
Apr 7 09:06:43 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4862] ms: 3
Apr 7 09:06:43 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4862] ms: 3
Apr 7 09:06:43 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4862] ms: 3
Apr 7 09:06:43 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4862] ms: 3
Apr 7 09:06:43 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4862] ms: 3
Apr 7 09:06:43 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4862] ms: 3
Apr 7 09:06:43 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4862] ms: 3
Apr 7 09:06:43 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4862] ms: 3
Apr 7 09:06:43 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:43 vdr vdr: [4869] ms: 3
Apr 7 09:06:43 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4869] ms: 3
Apr 7 09:06:44 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4869] ms: 3
Apr 7 09:06:44 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4869] ms: 3
Apr 7 09:06:44 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4869] ms: 3
Apr 7 09:06:44 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4869] ms: 3
Apr 7 09:06:44 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4869] ms: 3
Apr 7 09:06:44 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4869] ms: 3
Apr 7 09:06:44 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4869] ms: 3
Apr 7 09:06:44 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4869] ms: 3
Apr 7 09:06:44 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:44 vdr vdr: [4862] ms: 3
Apr 7 09:06:44 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 3
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4862] ms: 3
Apr 7 09:06:45 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 3
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4862] ms: 3
Apr 7 09:06:45 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 3
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4862] ms: 3
Apr 7 09:06:45 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 3
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4862] ms: 3
Apr 7 09:06:45 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 2
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 1207548405
Apr 7 09:06:45 vdr vdr: [4869] resetTime2: 1207548405
Apr 7 09:06:45 vdr vdr: [4869] CAM 1: module present
Apr 7 09:06:45 vdr vdr: [4862] ms: 2
Apr 7 09:06:45 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 2
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4862] ms: 2
Apr 7 09:06:45 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 2
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4862] ms: 2
Apr 7 09:06:45 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 2
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4862] ms: 2
Apr 7 09:06:45 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 2
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4862] ms: 2
Apr 7 09:06:45 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:45 vdr vdr: [4869] ms: 2
Apr 7 09:06:45 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4862] ms: 2
Apr 7 09:06:46 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4869] ms: 2
Apr 7 09:06:46 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4862] ms: 2
Apr 7 09:06:46 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4869] ms: 2
Apr 7 09:06:46 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4862] ms: 2
Apr 7 09:06:46 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4869] ms: 2
Apr 7 09:06:46 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4862] ms: 2
Apr 7 09:06:46 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4869] ms: 2
Apr 7 09:06:46 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4862] ms: 2
Apr 7 09:06:46 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4869] ms: 2
Apr 7 09:06:46 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4862] ms: 2
Apr 7 09:06:46 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4869] ms: 2
Apr 7 09:06:46 vdr vdr: [4869] resetTime1: 0
Apr 7 09:06:46 vdr vdr: [4862] ms: 2
Apr 7 09:06:46 vdr vdr: [4862] resetTime1: 0
Apr 7 09:06:46 vdr kernel: dvb_ca adapter 1: DVB CAM detected and initialised
successfully
Apr 7 09:06:46 vdr vdr: [4869] ms: 3
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