On Tuesday, July 10, 2018 at 7:01:32 AM UTC-7, David Fishburn wrote:
> On Mon, Jul 9, 2018 at 6:21 PM 'Ameesh Oza' via vim_use
> <[email protected]> wrote:
> On Friday, July 6, 2018 at 6:23:15 AM UTC-7, David Fishburn wrote:
>
> > On Thu, Jul 5, 2018 at 12:38 PM 'Ameesh Oza' via vim_use
> > <[email protected]> wrote:
>
> > On Wednesday, July 4, 2018 at 5:08:51 AM UTC-7, David Fishburn wrote:
>
> > ...
>
> >
> ...
> >
>
> > Hmm, pattern not found. That sounds like it has not picked up the syntax
> > list.
>
> >
>
> ...
>
> :e test.upf
>
>
> ...
> i<C-X><C-O> gives me a list of words
>
>
>
> :echo OmniSyntaxList()
>
> ['-', '-ack_delay', '-ack_port', '-all_equivalent', '-applies_to',
> '-assert_r_mutex', '-assert_rs_mutex', '-assert_
> ...
>
> :e test.sv
>
>
> i<C-X><C-O>
>
> -- Omni completion (^O^N^P) Pattern not found
>
>
>
> :echo OmniSyntaxList()
>
> []
>
>
>
>
>
> Well, that would explain the pattern not found.
> When you are in this state and you run:
> :syntax list
>
>
> What output do you get?
>
>
> The syntaxComplete plugin pulls what to highlight from the output of that
> command.
>
>
> When I try this on my 7.4 system I get:
> :e dave.sv
>
>
>
> syntax list
> --- Syntax items ---
> verilogStatement xxx always highz0 highz1 posedge noshowcancelled notif0
> notif1 force endgenerate or realtime instance pmos cmos cell automatic genvar
> rnmos nand wait weak0 weak1 initial trireg pullup
> parameter table large input event output ifnone unsigned
> and xnor endtable real config pulldown pulsestyle_onevent incdir rpmos medium
> rcmos generate pull0 liblist showcancelled rtran
> endprimitive scalared endmodule rtranif0 rtranif1
> specparam xor endspecify wand inout wor endtask task endfunction bufif0
> bufif1 small library wire time primitive tranif0 tranif1 triand
> integer localparam endconfig assign tran disable reg
> module nmos macromodule negedge trior tri0 tri1 release include nor not
> specify defparam pull1 vectored pulsestyle_ondetect buf
> function deassign tri edge strong0 strong1 design signed
> use supply0 supply1
> links to Statement
> verilogLabel xxx end join begin fork
> ...
>
>
>
>
> :echo OmniSyntaxList()
>
>
>
>
> ['accept_on', 'alias', 'always_comb', 'always_ff', 'always_latch', 'assert',
> 'assume', 'before', 'bind', 'bins', 'binsof', 'bit', 'break', 'byte',
> 'chandle', 'checker', 'class', 'clocking', 'const', 'constra
> int', 'context', 'continue', 'cover', 'covergroup', 'coverpoint', 'cross',
> 'dist', 'do', 'endchecker', 'endclass', 'endclocking', 'endgroup',
> 'endinterface', 'endpackage', 'endprogram', 'endproperty', 'endse
> quence', 'enum', 'eventually', ....
>
> David
:syntax list
verilogStatement xxx highz0 highz1 always_comb force automatic pullup genvar
parameter table input this alias
config import tagged generate rtran endprimitive rtranif0
rtranif1 specparam sequence
endspecify wor super library endpackage export first_match
throughout semaphore localparam
endconfig set_randstate randcase module module before dist
negedge include pull0 pull1
coverpoint endprogram int use within endgroup wait notif0
notif1 endgenerate chandle
endmodule endmodule endsequence std null var constraint
event extends ifnone and xnor
endtable real const pulsestyle_onevent class showcancelled
function solve wand endtask wire
struct tri extern sample strong0 strong1 ref reg cross nmos
with defparam wildcard vectored
deassign disable package always_latch pure randsequence
scalared pmos cmos cell triggered
nand longint unsigned inout get_randstate always_ff void
program type pulldown randomize
endclass covergroup xor endproperty small context priority
time time assign ignore_bins
srandom rand bit macromodule assume trior nor not modport
virtual shortreal always posedge
noshowcancelled or triand wait_order realtime instance final
string rnmos tran inside weak0
weak1 initial timeunit clocking large unique output specify
property new local matches uwire
incdir endinterface protected rpmos rcmos intersect liblist
binsof expect illegal_bins trireg
task packed endfunction bufif0 bufif1 timeprecision static
interface cover tranif0 tranif1
medium integer union shortint primitive endclocking tri0
tri1 release pulsestyle_ondetect buf
-- More --
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