Yeah, adding faster RAM to a computer with some
soldered to the board permanently won't affect
the speed. Its only systems with no permanently
installed RAM that there is any effect from using
faster RAM. It also depends on how close to the
end of the read/write window the slowest specified
RAM gets before its ready. If its always smack up
against the end of the window, faster RAM can
give a little speedup and may improve reliability
since the read and write operations have more time
to complete should something cause an unexpected
delay. Hmm, I popped "Memory Timing Diagram" into
dogpile.com and got...
http://users.ece.gatech.edu/~girishps/4173_sta1/sld008.htm
--- Bill Judson <[EMAIL PROTECTED]> wrote:
> Hm, interesting...back when my LCII was a current
> Mac, a number of people
> asked support forums like this & assorted other Mac
> sages of the ages
> whether putting 80ns or faster SIMMs in place of the
> 100ns spec'd would make
> these slowpokes run faster. The answer, uniformly
> was no, because the memory
> controller was permanently set to 100ns. Your reply,
> tho', makes me wonder
> whether that was just true of Macs with some
> soldered-in RAM (as nearly all
> current models were in those days), as the soldered
> RAM had to hold back the
> potential of the faster RAM for the sake of coherent
> bus traffic?
>
> I wonder if that doesn't apply to models (like, for
> instance, 2 that I own,
> the IIfx & the 7200) that only have SIMM slots?
> "They" say that when
> upgrading the processor on (say) the 601-604e PCI
> machines, it often works
> better if the RAM is all bumped up to 60ns. Would it
> be true of the all-slot
> IIs, do you think?
>
> Gregg Eshelman <[EMAIL PROTECTED]>:
> >
> > --- Amber Rhea <[EMAIL PROTECTED]> wrote:
> >
> >> I've often wondered what would happen if one
> tried
> [...]
> >
> > If you take a IIci and install 70ns SIMMs in one
> > bank and 60ns in the other, it will all run at
> > 70ns. The same goes for PCs, except for the olden
> > days of memory cards on the ISA bus.
> >
> [...]
=====
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