Jeremy Fitzhardinge wrote:
> H. Peter Anvin wrote:
>> Yes, pretty much.  There are enough evidence that you can't trust CPU 
>> architecture to stay sane.  Inside Transmeta it was a constant battle, 
>> and we were a small company.
>>   
> 
> Is there any indication that the msr or cpuid instructions will change
> in this way?  rd/wrmsr is pretty explicitly documented as taking the msr
> in %ecx, and the value in %edx:eax; do you think that will change?  And
> likewise cpuid?

CPUID already has changed: some CPUID levels are sensitive to %ecx event 
though CPUID was originally documented as being sensitive only to %eax, 
and I know from personal experience that there are undocumented CPUID 
levels in the wild which are sensitive to %ebx.  I can't say for sure 
(at least on the record) if there are MSRs with nonarchitectural 
sensitivities in the wild, but if there aren't, I can guarantee that it 
will happen sooner or later, if only because some junior microcode 
designer thought it was a great idea.

        -hpa
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