Avi Kivity wrote:
Anthony Liguori wrote:
- nr = vcpu->regs[VCPU_REGS_RBX] & -1u;
- a0 = vcpu->regs[VCPU_REGS_RAX] & -1u;
+ nr = vcpu->regs[VCPU_REGS_RAX] & -1u;
+ a0 = vcpu->regs[VCPU_REGS_RBX] & -1u;
- * Each hypercall may have 0-6 parameters.
- *
- * 64-bit hypercall index is in RAX, goes from 0 to __NR_hypercalls-1
- *
- * 64-bit parameters 1-6 are in the standard gcc x86_64 calling
convention
- * order: RDI, RSI, RDX, RCX, R8, R9.
+ * Each hypercall may have 0-4 parameters.
*
- * 32-bit index is EBX, parameters are: EAX, ECX, EDX, ESI, EDI, EBP.
- * (the first 3 are according to the gcc regparm calling convention)
+ * 32-bit index is EAX, parameters are: EBX, ECX, EDX, ESI.
What's the motivation for these changes?
If we're queuing hypercalls, then having 4 arguments verses 6 means that
we can queue 50% more hypercalls in a single page. Using all six
arguments clobbers all the GP registers in 32-bit mode too.
Regards,
Anthony Liguori
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