On Mon, Nov 07, 2011 at 03:46:23PM +1030, Rusty Russell wrote:
> On Sun, 6 Nov 2011 23:38:49 +0200, "Michael S. Tsirkin" <[email protected]> 
> wrote:
> > On Sun, Nov 06, 2011 at 10:24:57PM +0200, Sasha Levin wrote:
> > > On Sun, 2011-11-06 at 09:30 +0200, Michael S. Tsirkin wrote:
> > > > On Fri, Nov 04, 2011 at 04:53:05PM +0200, Sasha Levin wrote:
> > > > > > I guess my assumption is that most options will be in use,
> > > > > > not discarded dead-ends.
> > > > > 
> > > > > I don't know about that. 64 bit features would be pretty rare for now 
> > > > > -
> > > > > and I don't think that setting the alignment will be also enabled by
> > > > > default.
> 
> The truth is somewhere between.  New features tend to be used, and
> importantly, they have to be offered.
> 
> Anyway, the *per-device* config part will be contiguous.  So we're
> talking about pci-specific features.
> 
> So far, the only three things make sense to have in a capability list:
> MSI-X, the upper 32 feature bits, and the per-device config.
> 
> Thanks,
> Rusty.

You mean the queue # to MSI-X vector mapping?
One thing to remember is that it must be in the same type of BAR as
the queue selection, since by PCI rules MMIO writes aren't I think
ordered with PIO writes (it doesn't matter with KVM but might
with another hypervisor).

-- 
MST
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