-------- In message <1429713386.29372.25.camel@D2>, Ken Peek writes: >and balancing JFET switch transitions >during an ADC cycle is the "secret sauce" that is at the heart of the >3458A's stellar INL spec. No one else has that. No one else ever will. >*WAY* too expensive for even Keysight to redesign these days. Just is >not going to happen...
Sorry to burst your bubble, but I'm pretty sure that's an integral feature of a number of ADC chips already. Probably something about a patent expiring... PS: There's a very instructive walk through the HP multislope in AOE3. Doesn't really go into the 3458 much, but they lay out how the subsequent versions in 34401/34972 do things. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 [email protected] | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. _______________________________________________ volt-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/volt-nuts and follow the instructions there.
