Title: [228932] trunk/Source/_javascript_Core
Revision
228932
Author
mark....@apple.com
Date
2018-02-22 13:53:12 -0800 (Thu, 22 Feb 2018)

Log Message

Refactor MacroAssembler code to improve reuse and extensibility.
https://bugs.webkit.org/show_bug.cgi?id=183054
<rdar://problem/37797337>

Reviewed by Saam Barati.

* assembler/ARM64Assembler.h:
* assembler/MacroAssembler.cpp:
* assembler/MacroAssembler.h:
* assembler/MacroAssemblerARM.h:
* assembler/MacroAssemblerARM64.h:
(JSC::MacroAssemblerARM64::canCompact):
(JSC::MacroAssemblerARM64::computeJumpType):
(JSC::MacroAssemblerARM64::jumpSizeDelta):
(JSC::MacroAssemblerARM64::link):
(JSC::MacroAssemblerARM64::load64):
(JSC::MacroAssemblerARM64::load64WithAddressOffsetPatch):
(JSC::MacroAssemblerARM64::load32):
(JSC::MacroAssemblerARM64::load32WithAddressOffsetPatch):
(JSC::MacroAssemblerARM64::load16):
(JSC::MacroAssemblerARM64::load16SignedExtendTo32):
(JSC::MacroAssemblerARM64::load8):
(JSC::MacroAssemblerARM64::load8SignedExtendTo32):
(JSC::MacroAssemblerARM64::store64):
(JSC::MacroAssemblerARM64::store64WithAddressOffsetPatch):
(JSC::MacroAssemblerARM64::store32):
(JSC::MacroAssemblerARM64::store32WithAddressOffsetPatch):
(JSC::MacroAssemblerARM64::store16):
(JSC::MacroAssemblerARM64::store8):
(JSC::MacroAssemblerARM64::getEffectiveAddress):
(JSC::MacroAssemblerARM64::branchDoubleNonZero):
(JSC::MacroAssemblerARM64::branchDoubleZeroOrNaN):
(JSC::MacroAssemblerARM64::branchTruncateDoubleToInt32):
(JSC::MacroAssemblerARM64::loadDouble):
(JSC::MacroAssemblerARM64::loadFloat):
(JSC::MacroAssemblerARM64::moveConditionallyAfterFloatingPointCompare):
(JSC::MacroAssemblerARM64::moveDoubleConditionallyAfterFloatingPointCompare):
(JSC::MacroAssemblerARM64::storeDouble):
(JSC::MacroAssemblerARM64::storeFloat):
(JSC::MacroAssemblerARM64::call):
(JSC::MacroAssemblerARM64::jump):
(JSC::MacroAssemblerARM64::tailRecursiveCall):
(JSC::MacroAssemblerARM64::setCarry):
(JSC::MacroAssemblerARM64::reemitInitialMoveWithPatch):
(JSC::MacroAssemblerARM64::isBreakpoint):
(JSC::MacroAssemblerARM64::invert):
(JSC::MacroAssemblerARM64::readCallTarget):
(JSC::MacroAssemblerARM64::replaceWithVMHalt):
(JSC::MacroAssemblerARM64::replaceWithJump):
(JSC::MacroAssemblerARM64::maxJumpReplacementSize):
(JSC::MacroAssemblerARM64::patchableJumpSize):
(JSC::MacroAssemblerARM64::repatchCall):
(JSC::MacroAssemblerARM64::makeBranch):
(JSC::MacroAssemblerARM64::makeCompareAndBranch):
(JSC::MacroAssemblerARM64::makeTestBitAndBranch):
(JSC::MacroAssemblerARM64::ARM64Condition):
(JSC::MacroAssemblerARM64::moveWithFixedWidth):
(JSC::MacroAssemblerARM64::load):
(JSC::MacroAssemblerARM64::store):
(JSC::MacroAssemblerARM64::tryLoadWithOffset):
(JSC::MacroAssemblerARM64::tryLoadSignedWithOffset):
(JSC::MacroAssemblerARM64::tryStoreWithOffset):
(JSC::MacroAssemblerARM64::jumpAfterFloatingPointCompare):
(JSC::MacroAssemblerARM64::linkCall):
* assembler/MacroAssemblerARMv7.h:
* assembler/MacroAssemblerMIPS.h:
* assembler/MacroAssemblerX86Common.h:
* assembler/ProbeStack.h:
- Removed a forward declaration of an obsolete class.

Modified Paths

Diff

Modified: trunk/Source/_javascript_Core/ChangeLog (228931 => 228932)


--- trunk/Source/_javascript_Core/ChangeLog	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/ChangeLog	2018-02-22 21:53:12 UTC (rev 228932)
@@ -1,3 +1,75 @@
+2018-02-22  Mark Lam  <mark....@apple.com>
+
+        Refactor MacroAssembler code to improve reuse and extensibility.
+        https://bugs.webkit.org/show_bug.cgi?id=183054
+        <rdar://problem/37797337>
+
+        Reviewed by Saam Barati.
+
+        * assembler/ARM64Assembler.h:
+        * assembler/MacroAssembler.cpp:
+        * assembler/MacroAssembler.h:
+        * assembler/MacroAssemblerARM.h:
+        * assembler/MacroAssemblerARM64.h:
+        (JSC::MacroAssemblerARM64::canCompact):
+        (JSC::MacroAssemblerARM64::computeJumpType):
+        (JSC::MacroAssemblerARM64::jumpSizeDelta):
+        (JSC::MacroAssemblerARM64::link):
+        (JSC::MacroAssemblerARM64::load64):
+        (JSC::MacroAssemblerARM64::load64WithAddressOffsetPatch):
+        (JSC::MacroAssemblerARM64::load32):
+        (JSC::MacroAssemblerARM64::load32WithAddressOffsetPatch):
+        (JSC::MacroAssemblerARM64::load16):
+        (JSC::MacroAssemblerARM64::load16SignedExtendTo32):
+        (JSC::MacroAssemblerARM64::load8):
+        (JSC::MacroAssemblerARM64::load8SignedExtendTo32):
+        (JSC::MacroAssemblerARM64::store64):
+        (JSC::MacroAssemblerARM64::store64WithAddressOffsetPatch):
+        (JSC::MacroAssemblerARM64::store32):
+        (JSC::MacroAssemblerARM64::store32WithAddressOffsetPatch):
+        (JSC::MacroAssemblerARM64::store16):
+        (JSC::MacroAssemblerARM64::store8):
+        (JSC::MacroAssemblerARM64::getEffectiveAddress):
+        (JSC::MacroAssemblerARM64::branchDoubleNonZero):
+        (JSC::MacroAssemblerARM64::branchDoubleZeroOrNaN):
+        (JSC::MacroAssemblerARM64::branchTruncateDoubleToInt32):
+        (JSC::MacroAssemblerARM64::loadDouble):
+        (JSC::MacroAssemblerARM64::loadFloat):
+        (JSC::MacroAssemblerARM64::moveConditionallyAfterFloatingPointCompare):
+        (JSC::MacroAssemblerARM64::moveDoubleConditionallyAfterFloatingPointCompare):
+        (JSC::MacroAssemblerARM64::storeDouble):
+        (JSC::MacroAssemblerARM64::storeFloat):
+        (JSC::MacroAssemblerARM64::call):
+        (JSC::MacroAssemblerARM64::jump):
+        (JSC::MacroAssemblerARM64::tailRecursiveCall):
+        (JSC::MacroAssemblerARM64::setCarry):
+        (JSC::MacroAssemblerARM64::reemitInitialMoveWithPatch):
+        (JSC::MacroAssemblerARM64::isBreakpoint):
+        (JSC::MacroAssemblerARM64::invert):
+        (JSC::MacroAssemblerARM64::readCallTarget):
+        (JSC::MacroAssemblerARM64::replaceWithVMHalt):
+        (JSC::MacroAssemblerARM64::replaceWithJump):
+        (JSC::MacroAssemblerARM64::maxJumpReplacementSize):
+        (JSC::MacroAssemblerARM64::patchableJumpSize):
+        (JSC::MacroAssemblerARM64::repatchCall):
+        (JSC::MacroAssemblerARM64::makeBranch):
+        (JSC::MacroAssemblerARM64::makeCompareAndBranch):
+        (JSC::MacroAssemblerARM64::makeTestBitAndBranch):
+        (JSC::MacroAssemblerARM64::ARM64Condition):
+        (JSC::MacroAssemblerARM64::moveWithFixedWidth):
+        (JSC::MacroAssemblerARM64::load):
+        (JSC::MacroAssemblerARM64::store):
+        (JSC::MacroAssemblerARM64::tryLoadWithOffset):
+        (JSC::MacroAssemblerARM64::tryLoadSignedWithOffset):
+        (JSC::MacroAssemblerARM64::tryStoreWithOffset):
+        (JSC::MacroAssemblerARM64::jumpAfterFloatingPointCompare):
+        (JSC::MacroAssemblerARM64::linkCall):
+        * assembler/MacroAssemblerARMv7.h:
+        * assembler/MacroAssemblerMIPS.h:
+        * assembler/MacroAssemblerX86Common.h:
+        * assembler/ProbeStack.h:
+        - Removed a forward declaration of an obsolete class.
+
 2018-02-22  Yusuke Suzuki  <utatane....@gmail.com>
 
         Remove sleep(double) and sleepMS(double) interfaces

Modified: trunk/Source/_javascript_Core/assembler/ARM64Assembler.h (228931 => 228932)


--- trunk/Source/_javascript_Core/assembler/ARM64Assembler.h	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/assembler/ARM64Assembler.h	2018-02-22 21:53:12 UTC (rev 228932)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2012-2017 Apple Inc. All rights reserved.
+ * Copyright (C) 2012-2018 Apple Inc. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -308,7 +308,7 @@
         return nameForRegister[id];
     }
 
-private:
+protected:
     static constexpr bool isSp(RegisterID reg) { return ARM64Registers::isSp(reg); }
     static constexpr bool isZr(RegisterID reg) { return ARM64Registers::isZr(reg); }
 
@@ -515,7 +515,7 @@
         return isValidSignedImm9(offset);
     }
 
-private:
+protected:
     int encodeFPImm(double d)
     {
         ASSERT(canEncodeFPImm(d));
@@ -2989,7 +2989,7 @@
         }
     }
 
-private:
+protected:
     template<Datasize size>
     static bool checkMovk(int insn, int _hw, RegisterID _rd)
     {
@@ -3754,6 +3754,9 @@
     Vector<LinkRecord, 0, UnsafeVectorOverflow> m_jumpsToLink;
     int m_indexOfLastWatchpoint;
     int m_indexOfTailOfLastWatchpoint;
+
+public:
+    static constexpr ptrdiff_t MAX_POINTER_BITS = 48;
 };
 
 } // namespace JSC

Modified: trunk/Source/_javascript_Core/assembler/MacroAssembler.cpp (228931 => 228932)


--- trunk/Source/_javascript_Core/assembler/MacroAssembler.cpp	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/assembler/MacroAssembler.cpp	2018-02-22 21:53:12 UTC (rev 228932)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2012-2017 Apple Inc. All rights reserved.
+ * Copyright (C) 2012-2018 Apple Inc. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -33,6 +33,10 @@
 #include <wtf/PrintStream.h>
 #include <wtf/ScopedLambda.h>
 
+#if USE(APPLE_INTERNAL_SDK) && __has_include(<WebKitAdditions/MacroAssemblerSupport.h>)
+#include <WebKitAdditions/MacroAssemblerSupport.h>
+#endif
+
 namespace JSC {
 
 const double MacroAssembler::twoToThe32 = (double)0x100000000ull;

Modified: trunk/Source/_javascript_Core/assembler/MacroAssembler.h (228931 => 228932)


--- trunk/Source/_javascript_Core/assembler/MacroAssembler.h	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/assembler/MacroAssembler.h	2018-02-22 21:53:12 UTC (rev 228932)
@@ -30,30 +30,35 @@
 #include "JSCJSValue.h"
 
 #if CPU(ARM_THUMB2)
+#define TARGET_ASSEMBLER ARMv7Assembler
+#define TARGET_MACROASSEMBLER MacroAssemblerARMv7
 #include "MacroAssemblerARMv7.h"
 namespace JSC { typedef MacroAssemblerARMv7 MacroAssemblerBase; };
 
 #elif CPU(ARM64)
+#define TARGET_ASSEMBLER ARM64Assembler
+#define TARGET_MACROASSEMBLER MacroAssemblerARM64
 #include "MacroAssemblerARM64.h"
-namespace JSC { typedef MacroAssemblerARM64 MacroAssemblerBase; };
 
 #elif CPU(ARM_TRADITIONAL)
+#define TARGET_ASSEMBLER ARMAssembler
+#define TARGET_MACROASSEMBLER MacroAssemblerARM
 #include "MacroAssemblerARM.h"
-namespace JSC { typedef MacroAssemblerARM MacroAssemblerBase; };
 
 #elif CPU(MIPS)
+#define TARGET_ASSEMBLER MIPSAssembler
+#define TARGET_MACROASSEMBLER MacroAssemblerMIPS
 #include "MacroAssemblerMIPS.h"
-namespace JSC {
-typedef MacroAssemblerMIPS MacroAssemblerBase;
-};
 
 #elif CPU(X86)
+#define TARGET_ASSEMBLER X86Assembler
+#define TARGET_MACROASSEMBLER MacroAssemblerX86
 #include "MacroAssemblerX86.h"
-namespace JSC { typedef MacroAssemblerX86 MacroAssemblerBase; };
 
 #elif CPU(X86_64)
+#define TARGET_ASSEMBLER X86Assembler
+#define TARGET_MACROASSEMBLER MacroAssemblerX86_64
 #include "MacroAssemblerX86_64.h"
-namespace JSC { typedef MacroAssemblerX86_64 MacroAssemblerBase; };
 
 #else
 #error "The MacroAssembler is not supported on this platform."
@@ -86,6 +91,8 @@
 
 } // namespace Printer
 
+using MacroAssemblerBase = TARGET_MACROASSEMBLER;
+
 class MacroAssembler : public MacroAssemblerBase {
 public:
 

Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerARM.h (228931 => 228932)


--- trunk/Source/_javascript_Core/assembler/MacroAssemblerARM.h	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerARM.h	2018-02-22 21:53:12 UTC (rev 228932)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2008-2017 Apple Inc.
+ * Copyright (C) 2008-2018 Apple Inc.
  * Copyright (C) 2009, 2010 University of Szeged
  * All rights reserved.
  *
@@ -34,7 +34,9 @@
 
 namespace JSC {
 
-class MacroAssemblerARM : public AbstractMacroAssembler<ARMAssembler> {
+using Assembler = TARGET_ASSEMBLER;
+
+class MacroAssemblerARM : public AbstractMacroAssembler<Assembler> {
     static const int DoubleConditionMask = 0x0f;
     static const int DoubleConditionBitSpecial = 0x10;
     COMPILE_ASSERT(!(DoubleConditionBitSpecial & DoubleConditionMask), DoubleConditionBitSpecial_should_not_interfere_with_ARMAssembler_Condition_codes);

Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerARM64.h (228931 => 228932)


--- trunk/Source/_javascript_Core/assembler/MacroAssemblerARM64.h	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerARM64.h	2018-02-22 21:53:12 UTC (rev 228932)
@@ -34,7 +34,9 @@
 
 namespace JSC {
 
-class MacroAssemblerARM64 : public AbstractMacroAssembler<ARM64Assembler> {
+using Assembler = TARGET_ASSEMBLER;
+
+class MacroAssemblerARM64 : public AbstractMacroAssembler<Assembler> {
 public:
     static const unsigned numGPRs = 32;
     static const unsigned numFPRs = 32;
@@ -48,16 +50,18 @@
         return getCachedDataTempRegisterIDAndInvalidate();
     }
 
-private:
+protected:
     static const ARM64Registers::FPRegisterID fpTempRegister = ARM64Registers::q31;
-    static const ARM64Assembler::SetFlags S = ARM64Assembler::S;
+    static const Assembler::SetFlags S = Assembler::S;
     static const intptr_t maskHalfWord0 = 0xffffl;
     static const intptr_t maskHalfWord1 = 0xffff0000l;
     static const intptr_t maskUpperWord = 0xffffffff00000000l;
 
-    // 4 instructions - 3 to load the function pointer, + blr.
-    static const ptrdiff_t REPATCH_OFFSET_CALL_TO_POINTER = -16;
-    
+    static constexpr size_t INSTRUCTION_SIZE = 4;
+
+    // N instructions to load the pointer + 1 call instruction.
+    static constexpr ptrdiff_t REPATCH_OFFSET_CALL_TO_POINTER = -((Assembler::MAX_POINTER_BITS / 16 + 1) * INSTRUCTION_SIZE);
+
 public:
     MacroAssemblerARM64()
         : m_dataMemoryTempRegister(this, dataTempRegister)
@@ -66,21 +70,21 @@
     {
     }
 
-    typedef ARM64Assembler::LinkRecord LinkRecord;
-    typedef ARM64Assembler::JumpType JumpType;
-    typedef ARM64Assembler::JumpLinkType JumpLinkType;
-    typedef ARM64Assembler::Condition Condition;
+    typedef Assembler::LinkRecord LinkRecord;
+    typedef Assembler::JumpType JumpType;
+    typedef Assembler::JumpLinkType JumpLinkType;
+    typedef Assembler::Condition Condition;
 
-    static const ARM64Assembler::Condition DefaultCondition = ARM64Assembler::ConditionInvalid;
-    static const ARM64Assembler::JumpType DefaultJump = ARM64Assembler::JumpNoConditionFixedSize;
+    static const Assembler::Condition DefaultCondition = Assembler::ConditionInvalid;
+    static const Assembler::JumpType DefaultJump = Assembler::JumpNoConditionFixedSize;
 
     Vector<LinkRecord, 0, UnsafeVectorOverflow>& jumpsToLink() { return m_assembler.jumpsToLink(); }
     void* unlinkedCode() { return m_assembler.unlinkedCode(); }
-    static bool canCompact(JumpType jumpType) { return ARM64Assembler::canCompact(jumpType); }
-    static JumpLinkType computeJumpType(JumpType jumpType, const uint8_t* from, const uint8_t* to) { return ARM64Assembler::computeJumpType(jumpType, from, to); }
-    static JumpLinkType computeJumpType(LinkRecord& record, const uint8_t* from, const uint8_t* to) { return ARM64Assembler::computeJumpType(record, from, to); }
-    static int jumpSizeDelta(JumpType jumpType, JumpLinkType jumpLinkType) { return ARM64Assembler::jumpSizeDelta(jumpType, jumpLinkType); }
-    static void link(LinkRecord& record, uint8_t* from, const uint8_t* fromInstruction, uint8_t* to) { return ARM64Assembler::link(record, from, fromInstruction, to); }
+    static bool canCompact(JumpType jumpType) { return Assembler::canCompact(jumpType); }
+    static JumpLinkType computeJumpType(JumpType jumpType, const uint8_t* from, const uint8_t* to) { return Assembler::computeJumpType(jumpType, from, to); }
+    static JumpLinkType computeJumpType(LinkRecord& record, const uint8_t* from, const uint8_t* to) { return Assembler::computeJumpType(record, from, to); }
+    static int jumpSizeDelta(JumpType jumpType, JumpLinkType jumpLinkType) { return Assembler::jumpSizeDelta(jumpType, jumpLinkType); }
+    static void link(LinkRecord& record, uint8_t* from, const uint8_t* fromInstruction, uint8_t* to) { return Assembler::link(record, from, fromInstruction, to); }
 
     static const Scale ScalePtr = TimesEight;
 
@@ -91,46 +95,46 @@
     }
 
     enum RelationalCondition {
-        Equal = ARM64Assembler::ConditionEQ,
-        NotEqual = ARM64Assembler::ConditionNE,
-        Above = ARM64Assembler::ConditionHI,
-        AboveOrEqual = ARM64Assembler::ConditionHS,
-        Below = ARM64Assembler::ConditionLO,
-        BelowOrEqual = ARM64Assembler::ConditionLS,
-        GreaterThan = ARM64Assembler::ConditionGT,
-        GreaterThanOrEqual = ARM64Assembler::ConditionGE,
-        LessThan = ARM64Assembler::ConditionLT,
-        LessThanOrEqual = ARM64Assembler::ConditionLE
+        Equal = Assembler::ConditionEQ,
+        NotEqual = Assembler::ConditionNE,
+        Above = Assembler::ConditionHI,
+        AboveOrEqual = Assembler::ConditionHS,
+        Below = Assembler::ConditionLO,
+        BelowOrEqual = Assembler::ConditionLS,
+        GreaterThan = Assembler::ConditionGT,
+        GreaterThanOrEqual = Assembler::ConditionGE,
+        LessThan = Assembler::ConditionLT,
+        LessThanOrEqual = Assembler::ConditionLE
     };
 
     enum ResultCondition {
-        Overflow = ARM64Assembler::ConditionVS,
-        Signed = ARM64Assembler::ConditionMI,
-        PositiveOrZero = ARM64Assembler::ConditionPL,
-        Zero = ARM64Assembler::ConditionEQ,
-        NonZero = ARM64Assembler::ConditionNE
+        Overflow = Assembler::ConditionVS,
+        Signed = Assembler::ConditionMI,
+        PositiveOrZero = Assembler::ConditionPL,
+        Zero = Assembler::ConditionEQ,
+        NonZero = Assembler::ConditionNE
     };
 
     enum ZeroCondition {
-        IsZero = ARM64Assembler::ConditionEQ,
-        IsNonZero = ARM64Assembler::ConditionNE
+        IsZero = Assembler::ConditionEQ,
+        IsNonZero = Assembler::ConditionNE
     };
 
     enum DoubleCondition {
         // These conditions will only evaluate to true if the comparison is ordered - i.e. neither operand is NaN.
-        DoubleEqual = ARM64Assembler::ConditionEQ,
-        DoubleNotEqual = ARM64Assembler::ConditionVC, // Not the right flag! check for this & handle differently.
-        DoubleGreaterThan = ARM64Assembler::ConditionGT,
-        DoubleGreaterThanOrEqual = ARM64Assembler::ConditionGE,
-        DoubleLessThan = ARM64Assembler::ConditionLO,
-        DoubleLessThanOrEqual = ARM64Assembler::ConditionLS,
+        DoubleEqual = Assembler::ConditionEQ,
+        DoubleNotEqual = Assembler::ConditionVC, // Not the right flag! check for this & handle differently.
+        DoubleGreaterThan = Assembler::ConditionGT,
+        DoubleGreaterThanOrEqual = Assembler::ConditionGE,
+        DoubleLessThan = Assembler::ConditionLO,
+        DoubleLessThanOrEqual = Assembler::ConditionLS,
         // If either operand is NaN, these conditions always evaluate to true.
-        DoubleEqualOrUnordered = ARM64Assembler::ConditionVS, // Not the right flag! check for this & handle differently.
-        DoubleNotEqualOrUnordered = ARM64Assembler::ConditionNE,
-        DoubleGreaterThanOrUnordered = ARM64Assembler::ConditionHI,
-        DoubleGreaterThanOrEqualOrUnordered = ARM64Assembler::ConditionHS,
-        DoubleLessThanOrUnordered = ARM64Assembler::ConditionLT,
-        DoubleLessThanOrEqualOrUnordered = ARM64Assembler::ConditionLE,
+        DoubleEqualOrUnordered = Assembler::ConditionVS, // Not the right flag! check for this & handle differently.
+        DoubleNotEqualOrUnordered = Assembler::ConditionNE,
+        DoubleGreaterThanOrUnordered = Assembler::ConditionHI,
+        DoubleGreaterThanOrEqualOrUnordered = Assembler::ConditionHS,
+        DoubleLessThanOrUnordered = Assembler::ConditionLT,
+        DoubleLessThanOrEqualOrUnordered = Assembler::ConditionLE,
     };
 
     static const RegisterID stackPointerRegister = ARM64Registers::sp;
@@ -1048,12 +1052,12 @@
     void load64(BaseIndex address, RegisterID dest)
     {
         if (!address.offset && (!address.scale || address.scale == 3)) {
-            m_assembler.ldr<64>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.ldr<64>(dest, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.ldr<64>(dest, address.base, memoryTempRegister);
     }
 
@@ -1071,7 +1075,7 @@
     {
         DataLabel32 label(this);
         signExtend32ToPtrWithFixedWidth(address.offset, getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.ldr<64>(dest, address.base, memoryTempRegister, ARM64Assembler::SXTW, 0);
+        m_assembler.ldr<64>(dest, address.base, memoryTempRegister, Assembler::SXTW, 0);
         return label;
     }
     
@@ -1137,12 +1141,12 @@
     void load32(BaseIndex address, RegisterID dest)
     {
         if (!address.offset && (!address.scale || address.scale == 2)) {
-            m_assembler.ldr<32>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.ldr<32>(dest, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.ldr<32>(dest, address.base, memoryTempRegister);
     }
 
@@ -1155,7 +1159,7 @@
     {
         DataLabel32 label(this);
         signExtend32ToPtrWithFixedWidth(address.offset, getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.ldr<32>(dest, address.base, memoryTempRegister, ARM64Assembler::SXTW, 0);
+        m_assembler.ldr<32>(dest, address.base, memoryTempRegister, Assembler::SXTW, 0);
         return label;
     }
     
@@ -1184,12 +1188,12 @@
     void load16(BaseIndex address, RegisterID dest)
     {
         if (!address.offset && (!address.scale || address.scale == 1)) {
-            m_assembler.ldrh(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.ldrh(dest, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.ldrh(dest, address.base, memoryTempRegister);
     }
     
@@ -1215,12 +1219,12 @@
     void load16SignedExtendTo32(BaseIndex address, RegisterID dest)
     {
         if (!address.offset && (!address.scale || address.scale == 1)) {
-            m_assembler.ldrsh<32>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.ldrsh<32>(dest, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.ldrsh<32>(dest, address.base, memoryTempRegister);
     }
 
@@ -1246,12 +1250,12 @@
     void load8(BaseIndex address, RegisterID dest)
     {
         if (!address.offset && !address.scale) {
-            m_assembler.ldrb(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.ldrb(dest, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.ldrb(dest, address.base, memoryTempRegister);
     }
     
@@ -1280,12 +1284,12 @@
     void load8SignedExtendTo32(BaseIndex address, RegisterID dest)
     {
         if (!address.offset && !address.scale) {
-            m_assembler.ldrsb<32>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.ldrsb<32>(dest, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.ldrsb<32>(dest, address.base, memoryTempRegister);
     }
 
@@ -1319,12 +1323,12 @@
     void store64(RegisterID src, BaseIndex address)
     {
         if (!address.offset && (!address.scale || address.scale == 3)) {
-            m_assembler.str<64>(src, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.str<64>(src, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.str<64>(src, address.base, memoryTempRegister);
     }
     
@@ -1379,7 +1383,7 @@
     {
         DataLabel32 label(this);
         signExtend32ToPtrWithFixedWidth(address.offset, getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.str<64>(src, address.base, memoryTempRegister, ARM64Assembler::SXTW, 0);
+        m_assembler.str<64>(src, address.base, memoryTempRegister, Assembler::SXTW, 0);
         return label;
     }
 
@@ -1415,12 +1419,12 @@
     void store32(RegisterID src, BaseIndex address)
     {
         if (!address.offset && (!address.scale || address.scale == 2)) {
-            m_assembler.str<32>(src, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.str<32>(src, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.str<32>(src, address.base, memoryTempRegister);
     }
 
@@ -1476,7 +1480,7 @@
     {
         DataLabel32 label(this);
         signExtend32ToPtrWithFixedWidth(address.offset, getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.str<32>(src, address.base, memoryTempRegister, ARM64Assembler::SXTW, 0);
+        m_assembler.str<32>(src, address.base, memoryTempRegister, Assembler::SXTW, 0);
         return label;
     }
 
@@ -1492,12 +1496,12 @@
     void store16(RegisterID src, BaseIndex address)
     {
         if (!address.offset && (!address.scale || address.scale == 1)) {
-            m_assembler.strh(src, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.strh(src, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.strh(src, address.base, memoryTempRegister);
     }
 
@@ -1504,12 +1508,12 @@
     void store8(RegisterID src, BaseIndex address)
     {
         if (!address.offset && !address.scale) {
-            m_assembler.strb(src, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.strb(src, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.strb(src, address.base, memoryTempRegister);
     }
 
@@ -1559,7 +1563,7 @@
 
     void getEffectiveAddress(BaseIndex address, RegisterID dest)
     {
-        m_assembler.add<64>(dest, address.base, address.index, ARM64Assembler::LSL, address.scale);
+        m_assembler.add<64>(dest, address.base, address.index, Assembler::LSL, address.scale);
         if (address.offset)
             add64(TrustedImm32(address.offset), dest);
     }
@@ -1689,8 +1693,8 @@
     Jump branchDoubleNonZero(FPRegisterID reg, FPRegisterID)
     {
         m_assembler.fcmp_0<64>(reg);
-        Jump unordered = makeBranch(ARM64Assembler::ConditionVS);
-        Jump result = makeBranch(ARM64Assembler::ConditionNE);
+        Jump unordered = makeBranch(Assembler::ConditionVS);
+        Jump result = makeBranch(Assembler::ConditionNE);
         unordered.link(this);
         return result;
     }
@@ -1698,8 +1702,8 @@
     Jump branchDoubleZeroOrNaN(FPRegisterID reg, FPRegisterID)
     {
         m_assembler.fcmp_0<64>(reg);
-        Jump unordered = makeBranch(ARM64Assembler::ConditionVS);
-        Jump notEqual = makeBranch(ARM64Assembler::ConditionNE);
+        Jump unordered = makeBranch(Assembler::ConditionVS);
+        Jump notEqual = makeBranch(Assembler::ConditionNE);
         unordered.link(this);
         // We get here if either unordered or equal.
         Jump result = jump();
@@ -1713,7 +1717,7 @@
         m_assembler.fcvtzs<64, 64>(getCachedDataTempRegisterIDAndInvalidate(), src);
         zeroExtend32ToPtr(dataTempRegister, dest);
         // Check the low 32-bits sign extend to be equal to the full value.
-        m_assembler.cmp<64>(dataTempRegister, dataTempRegister, ARM64Assembler::SXTW, 0);
+        m_assembler.cmp<64>(dataTempRegister, dataTempRegister, Assembler::SXTW, 0);
         return Jump(makeBranch(branchType == BranchIfTruncateSuccessful ? Equal : NotEqual));
     }
 
@@ -1802,12 +1806,12 @@
     void loadDouble(BaseIndex address, FPRegisterID dest)
     {
         if (!address.offset && (!address.scale || address.scale == 3)) {
-            m_assembler.ldr<64>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.ldr<64>(dest, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.ldr<64>(dest, address.base, memoryTempRegister);
     }
     
@@ -1829,12 +1833,12 @@
     void loadFloat(BaseIndex address, FPRegisterID dest)
     {
         if (!address.offset && (!address.scale || address.scale == 2)) {
-            m_assembler.ldr<32>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.ldr<32>(dest, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.ldr<32>(dest, address.base, memoryTempRegister);
     }
 
@@ -1896,8 +1900,8 @@
     void moveConditionallyAfterFloatingPointCompare(DoubleCondition cond, RegisterID src, RegisterID dest)
     {
         if (cond == DoubleNotEqual) {
-            Jump unordered = makeBranch(ARM64Assembler::ConditionVS);
-            m_assembler.csel<datasize>(dest, src, dest, ARM64Assembler::ConditionNE);
+            Jump unordered = makeBranch(Assembler::ConditionVS);
+            m_assembler.csel<datasize>(dest, src, dest, Assembler::ConditionNE);
             unordered.link(this);
             return;
         }
@@ -1906,8 +1910,8 @@
             // next csel has all arguments equal to src.
             // If the compare is ordered, dest is unchanged and EQ decides
             // what value to set.
-            m_assembler.csel<datasize>(dest, src, dest, ARM64Assembler::ConditionVS);
-            m_assembler.csel<datasize>(dest, src, dest, ARM64Assembler::ConditionEQ);
+            m_assembler.csel<datasize>(dest, src, dest, Assembler::ConditionVS);
+            m_assembler.csel<datasize>(dest, src, dest, Assembler::ConditionEQ);
             return;
         }
         m_assembler.csel<datasize>(dest, src, dest, ARM64Condition(cond));
@@ -1917,8 +1921,8 @@
     void moveConditionallyAfterFloatingPointCompare(DoubleCondition cond, RegisterID thenCase, RegisterID elseCase, RegisterID dest)
     {
         if (cond == DoubleNotEqual) {
-            Jump unordered = makeBranch(ARM64Assembler::ConditionVS);
-            m_assembler.csel<datasize>(dest, thenCase, elseCase, ARM64Assembler::ConditionNE);
+            Jump unordered = makeBranch(Assembler::ConditionVS);
+            m_assembler.csel<datasize>(dest, thenCase, elseCase, Assembler::ConditionNE);
             unordered.link(this);
             return;
         }
@@ -1927,8 +1931,8 @@
             // next csel has all arguments equal to thenCase.
             // If the compare is ordered, dest is unchanged and EQ decides
             // what value to set.
-            m_assembler.csel<datasize>(elseCase, thenCase, elseCase, ARM64Assembler::ConditionVS);
-            m_assembler.csel<datasize>(dest, thenCase, elseCase, ARM64Assembler::ConditionEQ);
+            m_assembler.csel<datasize>(elseCase, thenCase, elseCase, Assembler::ConditionVS);
+            m_assembler.csel<datasize>(dest, thenCase, elseCase, Assembler::ConditionEQ);
             return;
         }
         m_assembler.csel<datasize>(dest, thenCase, elseCase, ARM64Condition(cond));
@@ -1938,8 +1942,8 @@
     void moveDoubleConditionallyAfterFloatingPointCompare(DoubleCondition cond, FPRegisterID thenCase, FPRegisterID elseCase, FPRegisterID dest)
     {
         if (cond == DoubleNotEqual) {
-            Jump unordered = makeBranch(ARM64Assembler::ConditionVS);
-            m_assembler.fcsel<datasize>(dest, thenCase, elseCase, ARM64Assembler::ConditionNE);
+            Jump unordered = makeBranch(Assembler::ConditionVS);
+            m_assembler.fcsel<datasize>(dest, thenCase, elseCase, Assembler::ConditionNE);
             unordered.link(this);
             return;
         }
@@ -1948,8 +1952,8 @@
             // next csel has all arguments equal to thenCase.
             // If the compare is ordered, dest is unchanged and EQ decides
             // what value to set.
-            m_assembler.fcsel<datasize>(elseCase, thenCase, elseCase, ARM64Assembler::ConditionVS);
-            m_assembler.fcsel<datasize>(dest, thenCase, elseCase, ARM64Assembler::ConditionEQ);
+            m_assembler.fcsel<datasize>(elseCase, thenCase, elseCase, Assembler::ConditionVS);
+            m_assembler.fcsel<datasize>(dest, thenCase, elseCase, Assembler::ConditionEQ);
             return;
         }
         m_assembler.fcsel<datasize>(dest, thenCase, elseCase, ARM64Condition(cond));
@@ -2046,12 +2050,12 @@
     void storeDouble(FPRegisterID src, BaseIndex address)
     {
         if (!address.offset && (!address.scale || address.scale == 3)) {
-            m_assembler.str<64>(src, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.str<64>(src, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.str<64>(src, address.base, memoryTempRegister);
     }
 
@@ -2067,12 +2071,12 @@
     void storeFloat(FPRegisterID src, BaseIndex address)
     {
         if (!address.offset && (!address.scale || address.scale == 2)) {
-            m_assembler.str<32>(src, address.base, address.index, ARM64Assembler::UXTX, address.scale);
+            m_assembler.str<32>(src, address.base, address.index, Assembler::UXTX, address.scale);
             return;
         }
 
         signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate());
-        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale);
+        m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, Assembler::UXTX, address.scale);
         m_assembler.str<32>(src, address.base, memoryTempRegister);
     }
 
@@ -3080,7 +3084,7 @@
         invalidateAllTempRegisters();
         m_assembler.blr(dataTempRegister);
         AssemblerLabel callLabel = m_assembler.label();
-        ASSERT_UNUSED(pointerLabel, ARM64Assembler::getDifferenceBetweenLabels(callLabel, pointerLabel) == REPATCH_OFFSET_CALL_TO_POINTER);
+        ASSERT_UNUSED(pointerLabel, Assembler::getDifferenceBetweenLabels(callLabel, pointerLabel) == REPATCH_OFFSET_CALL_TO_POINTER);
         return Call(callLabel, Call::Linkable);
     }
 
@@ -3101,7 +3105,7 @@
     {
         AssemblerLabel label = m_assembler.label();
         m_assembler.b();
-        return Jump(label, m_makeJumpPatchable ? ARM64Assembler::JumpNoConditionFixedSize : ARM64Assembler::JumpNoCondition);
+        return Jump(label, m_makeJumpPatchable ? Assembler::JumpNoConditionFixedSize : Assembler::JumpNoCondition);
     }
 
     void jump(RegisterID target)
@@ -3165,7 +3169,7 @@
         moveWithFixedWidth(TrustedImmPtr(0), getCachedDataTempRegisterIDAndInvalidate());
         m_assembler.br(dataTempRegister);
         AssemblerLabel callLabel = m_assembler.label();
-        ASSERT_UNUSED(pointerLabel, ARM64Assembler::getDifferenceBetweenLabels(callLabel, pointerLabel) == REPATCH_OFFSET_CALL_TO_POINTER);
+        ASSERT_UNUSED(pointerLabel, Assembler::getDifferenceBetweenLabels(callLabel, pointerLabel) == REPATCH_OFFSET_CALL_TO_POINTER);
         return Call(callLabel, Call::Linkable);
     }
 
@@ -3277,7 +3281,7 @@
 
     void setCarry(RegisterID dest)
     {
-        m_assembler.cset<32>(dest, ARM64Assembler::ConditionCS);
+        m_assembler.cset<32>(dest, Assembler::ConditionCS);
     }
 
     // Patchable operations
@@ -3404,7 +3408,7 @@
 
     static void reemitInitialMoveWithPatch(void* address, void* value)
     {
-        ARM64Assembler::setPointer(static_cast<int*>(address), value, dataTempRegister, true);
+        Assembler::setPointer(static_cast<int*>(address), value, dataTempRegister, true);
     }
 
     // Miscellaneous operations:
@@ -3414,7 +3418,7 @@
         m_assembler.brk(imm);
     }
 
-    static bool isBreakpoint(void* address) { return ARM64Assembler::isBrk(address); }
+    static bool isBreakpoint(void* address) { return Assembler::isBrk(address); }
 
     void nop()
     {
@@ -3731,7 +3735,7 @@
     // Invert a relational condition, e.g. == becomes !=, < becomes >=, etc.
     static RelationalCondition invert(RelationalCondition cond)
     {
-        return static_cast<RelationalCondition>(ARM64Assembler::invert(static_cast<ARM64Assembler::Condition>(cond)));
+        return static_cast<RelationalCondition>(Assembler::invert(static_cast<Assembler::Condition>(cond)));
     }
 
     static std::optional<ResultCondition> commuteCompareToZeroIntoTest(RelationalCondition cond)
@@ -3753,27 +3757,27 @@
 
     static FunctionPtr readCallTarget(CodeLocationCall call)
     {
-        return FunctionPtr(reinterpret_cast<void(*)()>(ARM64Assembler::readCallTarget(call.dataLocation())));
+        return FunctionPtr(reinterpret_cast<void(*)()>(Assembler::readCallTarget(call.dataLocation())));
     }
 
     static void replaceWithVMHalt(CodeLocationLabel instructionStart)
     {
-        ARM64Assembler::replaceWithVMHalt(instructionStart.executableAddress());
+        Assembler::replaceWithVMHalt(instructionStart.executableAddress());
     }
 
     static void replaceWithJump(CodeLocationLabel instructionStart, CodeLocationLabel destination)
     {
-        ARM64Assembler::replaceWithJump(instructionStart.dataLocation(), destination.dataLocation());
+        Assembler::replaceWithJump(instructionStart.dataLocation(), destination.dataLocation());
     }
     
     static ptrdiff_t maxJumpReplacementSize()
     {
-        return ARM64Assembler::maxJumpReplacementSize();
+        return Assembler::maxJumpReplacementSize();
     }
 
     static ptrdiff_t patchableJumpSize()
     {
-        return ARM64Assembler::patchableJumpSize();
+        return Assembler::patchableJumpSize();
     }
 
     RegisterID scratchRegisterForBlinding()
@@ -3820,21 +3824,21 @@
 
     static void repatchCall(CodeLocationCall call, CodeLocationLabel destination)
     {
-        ARM64Assembler::repatchPointer(call.dataLabelPtrAtOffset(REPATCH_OFFSET_CALL_TO_POINTER).dataLocation(), destination.executableAddress());
+        Assembler::repatchPointer(call.dataLabelPtrAtOffset(REPATCH_OFFSET_CALL_TO_POINTER).dataLocation(), destination.executableAddress());
     }
 
     static void repatchCall(CodeLocationCall call, FunctionPtr destination)
     {
-        ARM64Assembler::repatchPointer(call.dataLabelPtrAtOffset(REPATCH_OFFSET_CALL_TO_POINTER).dataLocation(), destination.executableAddress());
+        Assembler::repatchPointer(call.dataLabelPtrAtOffset(REPATCH_OFFSET_CALL_TO_POINTER).dataLocation(), destination.executableAddress());
     }
 
 protected:
-    ALWAYS_INLINE Jump makeBranch(ARM64Assembler::Condition cond)
+    ALWAYS_INLINE Jump makeBranch(Assembler::Condition cond)
     {
         m_assembler.b_cond(cond);
         AssemblerLabel label = m_assembler.label();
         m_assembler.nop();
-        return Jump(label, m_makeJumpPatchable ? ARM64Assembler::JumpConditionFixedSize : ARM64Assembler::JumpCondition, cond);
+        return Jump(label, m_makeJumpPatchable ? Assembler::JumpConditionFixedSize : Assembler::JumpCondition, cond);
     }
     ALWAYS_INLINE Jump makeBranch(RelationalCondition cond) { return makeBranch(ARM64Condition(cond)); }
     ALWAYS_INLINE Jump makeBranch(ResultCondition cond) { return makeBranch(ARM64Condition(cond)); }
@@ -3849,7 +3853,7 @@
             m_assembler.cbnz<dataSize>(reg);
         AssemblerLabel label = m_assembler.label();
         m_assembler.nop();
-        return Jump(label, m_makeJumpPatchable ? ARM64Assembler::JumpCompareAndBranchFixedSize : ARM64Assembler::JumpCompareAndBranch, static_cast<ARM64Assembler::Condition>(cond), dataSize == 64, reg);
+        return Jump(label, m_makeJumpPatchable ? Assembler::JumpCompareAndBranchFixedSize : Assembler::JumpCompareAndBranch, static_cast<Assembler::Condition>(cond), dataSize == 64, reg);
     }
 
     ALWAYS_INLINE Jump makeTestBitAndBranch(RegisterID reg, unsigned bit, ZeroCondition cond)
@@ -3862,25 +3866,25 @@
             m_assembler.tbnz(reg, bit);
         AssemblerLabel label = m_assembler.label();
         m_assembler.nop();
-        return Jump(label, m_makeJumpPatchable ? ARM64Assembler::JumpTestBitFixedSize : ARM64Assembler::JumpTestBit, static_cast<ARM64Assembler::Condition>(cond), bit, reg);
+        return Jump(label, m_makeJumpPatchable ? Assembler::JumpTestBitFixedSize : Assembler::JumpTestBit, static_cast<Assembler::Condition>(cond), bit, reg);
     }
 
-    ARM64Assembler::Condition ARM64Condition(RelationalCondition cond)
+    Assembler::Condition ARM64Condition(RelationalCondition cond)
     {
-        return static_cast<ARM64Assembler::Condition>(cond);
+        return static_cast<Assembler::Condition>(cond);
     }
 
-    ARM64Assembler::Condition ARM64Condition(ResultCondition cond)
+    Assembler::Condition ARM64Condition(ResultCondition cond)
     {
-        return static_cast<ARM64Assembler::Condition>(cond);
+        return static_cast<Assembler::Condition>(cond);
     }
 
-    ARM64Assembler::Condition ARM64Condition(DoubleCondition cond)
+    Assembler::Condition ARM64Condition(DoubleCondition cond)
     {
-        return static_cast<ARM64Assembler::Condition>(cond);
+        return static_cast<Assembler::Condition>(cond);
     }
     
-private:
+protected:
     ALWAYS_INLINE RegisterID getCachedDataTempRegisterIDAndInvalidate()
     {
         RELEASE_ASSERT(m_allowScratchRegister);
@@ -4015,6 +4019,8 @@
         m_assembler.movz<64>(dest, getHalfword(value, 0));
         m_assembler.movk<64>(dest, getHalfword(value, 1), 16);
         m_assembler.movk<64>(dest, getHalfword(value, 2), 32);
+        if (Assembler::MAX_POINTER_BITS > 48)
+            m_assembler.movk<64>(dest, getHalfword(value, 3), 48);
     }
 
     void signExtend32ToPtrWithFixedWidth(int32_t value, RegisterID dest)
@@ -4040,12 +4046,12 @@
                 cachedMemoryTempRegister().invalidate();
 
             if (isInIntRange(addressDelta)) {
-                if (ARM64Assembler::canEncodeSImmOffset(addressDelta)) {
+                if (Assembler::canEncodeSImmOffset(addressDelta)) {
                     m_assembler.ldur<datasize>(dest,  memoryTempRegister, addressDelta);
                     return;
                 }
 
-                if (ARM64Assembler::canEncodePImmOffset<datasize>(addressDelta)) {
+                if (Assembler::canEncodePImmOffset<datasize>(addressDelta)) {
                     m_assembler.ldr<datasize>(dest,  memoryTempRegister, addressDelta);
                     return;
                 }
@@ -4077,12 +4083,12 @@
             intptr_t addressDelta = addressAsInt - currentRegisterContents;
 
             if (isInIntRange(addressDelta)) {
-                if (ARM64Assembler::canEncodeSImmOffset(addressDelta)) {
+                if (Assembler::canEncodeSImmOffset(addressDelta)) {
                     m_assembler.stur<datasize>(src, memoryTempRegister, addressDelta);
                     return;
                 }
 
-                if (ARM64Assembler::canEncodePImmOffset<datasize>(addressDelta)) {
+                if (Assembler::canEncodePImmOffset<datasize>(addressDelta)) {
                     m_assembler.str<datasize>(src, memoryTempRegister, addressDelta);
                     return;
                 }
@@ -4162,11 +4168,11 @@
     template<int datasize>
     ALWAYS_INLINE bool tryLoadWithOffset(RegisterID rt, RegisterID rn, int32_t offset)
     {
-        if (ARM64Assembler::canEncodeSImmOffset(offset)) {
+        if (Assembler::canEncodeSImmOffset(offset)) {
             loadUnscaledImmediate<datasize>(rt, rn, offset);
             return true;
         }
-        if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) {
+        if (Assembler::canEncodePImmOffset<datasize>(offset)) {
             loadUnsignedImmediate<datasize>(rt, rn, static_cast<unsigned>(offset));
             return true;
         }
@@ -4176,11 +4182,11 @@
     template<int datasize>
     ALWAYS_INLINE bool tryLoadSignedWithOffset(RegisterID rt, RegisterID rn, int32_t offset)
     {
-        if (ARM64Assembler::canEncodeSImmOffset(offset)) {
+        if (Assembler::canEncodeSImmOffset(offset)) {
             loadSignedAddressedByUnscaledImmediate<datasize>(rt, rn, offset);
             return true;
         }
-        if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) {
+        if (Assembler::canEncodePImmOffset<datasize>(offset)) {
             loadSignedAddressedByUnsignedImmediate<datasize>(rt, rn, static_cast<unsigned>(offset));
             return true;
         }
@@ -4190,11 +4196,11 @@
     template<int datasize>
     ALWAYS_INLINE bool tryLoadWithOffset(FPRegisterID rt, RegisterID rn, int32_t offset)
     {
-        if (ARM64Assembler::canEncodeSImmOffset(offset)) {
+        if (Assembler::canEncodeSImmOffset(offset)) {
             m_assembler.ldur<datasize>(rt, rn, offset);
             return true;
         }
-        if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) {
+        if (Assembler::canEncodePImmOffset<datasize>(offset)) {
             m_assembler.ldr<datasize>(rt, rn, static_cast<unsigned>(offset));
             return true;
         }
@@ -4204,11 +4210,11 @@
     template<int datasize>
     ALWAYS_INLINE bool tryStoreWithOffset(RegisterID rt, RegisterID rn, int32_t offset)
     {
-        if (ARM64Assembler::canEncodeSImmOffset(offset)) {
+        if (Assembler::canEncodeSImmOffset(offset)) {
             storeUnscaledImmediate<datasize>(rt, rn, offset);
             return true;
         }
-        if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) {
+        if (Assembler::canEncodePImmOffset<datasize>(offset)) {
             storeUnsignedImmediate<datasize>(rt, rn, static_cast<unsigned>(offset));
             return true;
         }
@@ -4218,11 +4224,11 @@
     template<int datasize>
     ALWAYS_INLINE bool tryStoreWithOffset(FPRegisterID rt, RegisterID rn, int32_t offset)
     {
-        if (ARM64Assembler::canEncodeSImmOffset(offset)) {
+        if (Assembler::canEncodeSImmOffset(offset)) {
             m_assembler.stur<datasize>(rt, rn, offset);
             return true;
         }
-        if (ARM64Assembler::canEncodePImmOffset<datasize>(offset)) {
+        if (Assembler::canEncodePImmOffset<datasize>(offset)) {
             m_assembler.str<datasize>(rt, rn, static_cast<unsigned>(offset));
             return true;
         }
@@ -4396,14 +4402,14 @@
     {
         if (cond == DoubleNotEqual) {
             // ConditionNE jumps if NotEqual *or* unordered - force the unordered cases not to jump.
-            Jump unordered = makeBranch(ARM64Assembler::ConditionVS);
-            Jump result = makeBranch(ARM64Assembler::ConditionNE);
+            Jump unordered = makeBranch(Assembler::ConditionVS);
+            Jump result = makeBranch(Assembler::ConditionNE);
             unordered.link(this);
             return result;
         }
         if (cond == DoubleEqualOrUnordered) {
-            Jump unordered = makeBranch(ARM64Assembler::ConditionVS);
-            Jump notEqual = makeBranch(ARM64Assembler::ConditionNE);
+            Jump unordered = makeBranch(Assembler::ConditionVS);
+            Jump notEqual = makeBranch(Assembler::ConditionNE);
             unordered.link(this);
             // We get here if either unordered or equal.
             Jump result = jump();
@@ -4418,11 +4424,11 @@
     static void linkCall(void* code, Call call, FunctionPtr function)
     {
         if (!call.isFlagSet(Call::Near))
-            ARM64Assembler::linkPointer(code, call.m_label.labelAtOffset(REPATCH_OFFSET_CALL_TO_POINTER), function.value());
+            Assembler::linkPointer(code, call.m_label.labelAtOffset(REPATCH_OFFSET_CALL_TO_POINTER), function.value());
         else if (call.isFlagSet(Call::Tail))
-            ARM64Assembler::linkJump(code, call.m_label, function.value());
+            Assembler::linkJump(code, call.m_label, function.value());
         else
-            ARM64Assembler::linkCall(code, call.m_label, function.value());
+            Assembler::linkCall(code, call.m_label, function.value());
     }
 
     CachedTempRegister m_dataMemoryTempRegister;

Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerARMv7.h (228931 => 228932)


--- trunk/Source/_javascript_Core/assembler/MacroAssemblerARMv7.h	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerARMv7.h	2018-02-22 21:53:12 UTC (rev 228932)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2009-2017 Apple Inc. All rights reserved.
+ * Copyright (C) 2009-2018 Apple Inc. All rights reserved.
  * Copyright (C) 2010 University of Szeged
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,7 +33,9 @@
 
 namespace JSC {
 
-class MacroAssemblerARMv7 : public AbstractMacroAssembler<ARMv7Assembler> {
+using Assembler = TARGET_ASSEMBLER;
+
+class MacroAssemblerARMv7 : public AbstractMacroAssembler<Assembler> {
     static const RegisterID dataTempRegister = ARMRegisters::ip;
     static const RegisterID addressTempRegister = ARMRegisters::r6;
 

Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerMIPS.h (228931 => 228932)


--- trunk/Source/_javascript_Core/assembler/MacroAssemblerMIPS.h	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerMIPS.h	2018-02-22 21:53:12 UTC (rev 228932)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2008-2017 Apple Inc. All rights reserved.
+ * Copyright (C) 2008-2018 Apple Inc. All rights reserved.
  * Copyright (C) 2010 MIPS Technologies, Inc. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -33,7 +33,9 @@
 
 namespace JSC {
 
-class MacroAssemblerMIPS : public AbstractMacroAssembler<MIPSAssembler> {
+using Assembler = TARGET_ASSEMBLER;
+
+class MacroAssemblerMIPS : public AbstractMacroAssembler<Assembler> {
 public:
     typedef MIPSRegisters::FPRegisterID FPRegisterID;
     static const unsigned numGPRs = 32;

Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerX86Common.h (228931 => 228932)


--- trunk/Source/_javascript_Core/assembler/MacroAssemblerX86Common.h	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerX86Common.h	2018-02-22 21:53:12 UTC (rev 228932)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2008-2017 Apple Inc. All rights reserved.
+ * Copyright (C) 2008-2018 Apple Inc. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -37,7 +37,9 @@
 
 namespace JSC {
 
-class MacroAssemblerX86Common : public AbstractMacroAssembler<X86Assembler> {
+using Assembler = TARGET_ASSEMBLER;
+
+class MacroAssemblerX86Common : public AbstractMacroAssembler<Assembler> {
 public:
 #if CPU(X86_64)
     // Use this directly only if you're not generating code with it.

Modified: trunk/Source/_javascript_Core/assembler/ProbeStack.h (228931 => 228932)


--- trunk/Source/_javascript_Core/assembler/ProbeStack.h	2018-02-22 21:40:38 UTC (rev 228931)
+++ trunk/Source/_javascript_Core/assembler/ProbeStack.h	2018-02-22 21:53:12 UTC (rev 228932)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2017 Apple Inc. All rights reserved.
+ * Copyright (C) 2017-2018 Apple Inc. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -34,8 +34,6 @@
 
 namespace JSC {
 
-struct ProbeContext;
-
 namespace Probe {
 
 class Page {
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