[webkit-changes] [257524] trunk/Source/JavaScriptCore

[sbarati]

Title: [257524] trunk/Source/_javascript_Core

Revision

257524

Author

sbar...@apple.com

Date

2020-02-26 15:59:12 -0800 (Wed, 26 Feb 2020)

Log Message

Make testair pass on arm64
https://bugs.webkit.org/show_bug.cgi?id=208258

Reviewed by Tadeu Zagallo.

testElideMoveThenRealloc and testElideSimpleMove were never tested
on arm64. This patch makes those tests work.
- testElideMoveThenRealloc was using a BitImm that is invalid on arm64
- testElideSimpleMove was testing for the wrong disassembly

* b3/air/testair.cpp:

Modified Paths

• trunk/Source/_javascript_Core/ChangeLog
• trunk/Source/_javascript_Core/b3/air/testair.cpp

Diff

Modified: trunk/Source/_javascript_Core/ChangeLog (257523 => 257524)

--- trunk/Source/_javascript_Core/ChangeLog	2020-02-26 23:36:37 UTC (rev 257523)
+++ trunk/Source/_javascript_Core/ChangeLog	2020-02-26 23:59:12 UTC (rev 257524)
@@ -1,3 +1,17 @@
+2020-02-26  Saam Barati  <sbar...@apple.com>
+
+        Make testair pass on arm64
+        https://bugs.webkit.org/show_bug.cgi?id=208258
+
+        Reviewed by Tadeu Zagallo.
+
+        testElideMoveThenRealloc and testElideSimpleMove were never tested
+        on arm64. This patch makes those tests work. 
+        - testElideMoveThenRealloc was using a BitImm that is invalid on arm64
+        - testElideSimpleMove was testing for the wrong disassembly
+
+        * b3/air/testair.cpp:
+
 2020-02-26  Don Olmstead  <don.olmst...@sony.com>
 
         Allow setting of stack sizes for threads

Modified: trunk/Source/_javascript_Core/b3/air/testair.cpp (257523 => 257524)

--- trunk/Source/_javascript_Core/b3/air/testair.cpp	2020-02-26 23:36:37 UTC (rev 257523)
+++ trunk/Source/_javascript_Core/b3/air/testair.cpp	2020-02-26 23:59:12 UTC (rev 257524)
@@ -2096,11 +2096,19 @@
 
         auto compilation = compile(proc);
         CString disassembly = compilation->disassembly();
-        std::regex findRRMove(isARM64() ? "mov r\\d+, r\\d+\\n" : "mov %\\w+, %\\w+\\n");
+        std::regex findRRMove(isARM64() ? "mov\\s+x\\d+, x\\d+\\n" : "mov %\\w+, %\\w+\\n");
         auto result = matchAll(disassembly, findRRMove);
-        // sp -> fp; arg0 -> ret0; fp -> sp
-        // fp -> sp only happens in O0 because we don't actually need to move the stack in general.
-        CHECK(result.size() == 2 + !Options::defaultB3OptLevel());
+        if (isARM64()) {
+            if (!Options::defaultB3OptLevel())
+                CHECK(result.size() == 2);
+            else
+                CHECK(result.size() == 0);
+        } else if (isX86()) {
+            // sp -> fp; arg0 -> ret0; fp -> sp
+            // fp -> sp only happens in O0 because we don't actually need to move the stack in general.
+            CHECK(result.size() == 2 + !Options::defaultB3OptLevel());
+        } else
+            RELEASE_ASSERT_NOT_REACHED();
     }
 }
 
@@ -2177,10 +2185,19 @@
         BasicBlock* continuation = code.addBlock();
 
         Tmp tmp = code.newTmp(B3::GP);
+        Arg negOne;
+        if (isARM64()) {
+            negOne = code.newTmp(B3::GP);
+            root->append(Move, nullptr, Arg::bigImm(-1), negOne);
+        } else if (isX86())
+            negOne = Arg::bitImm(-1);
+        else
+            RELEASE_ASSERT_NOT_REACHED();
+
         {
             root->append(Move, nullptr, Arg::imm(1), Tmp(reg));
 
-            root->append(BranchTest32, nullptr, Arg::resCond(MacroAssembler::NonZero), Tmp(reg), Arg::bitImm(-1));
+            root->append(BranchTest32, nullptr, Arg::resCond(MacroAssembler::NonZero), Tmp(reg), negOne);
             root->setSuccessors(taken, notTaken);
         }
 
@@ -2190,7 +2207,7 @@
         }
 
         {
-            notTaken->append(BranchTest32, nullptr, Arg::resCond(MacroAssembler::NonZero), Tmp(reg), Arg::bitImm(-1));
+            notTaken->append(BranchTest32, nullptr, Arg::resCond(MacroAssembler::NonZero), Tmp(reg), negOne);
             notTaken->setSuccessors(continuation, notTakenReturn);
         }
 
@@ -2197,7 +2214,7 @@
         {
             tmp = code.newTmp(B3::GP);
             continuation->append(Move, nullptr, Arg::imm(42), tmp);
-            continuation->append(BranchTest32, nullptr, Arg::resCond(MacroAssembler::NonZero), tmp, Arg::bitImm(-1));
+            continuation->append(BranchTest32, nullptr, Arg::resCond(MacroAssembler::NonZero), tmp, negOne);
             continuation->setSuccessors(ret, notTakenReturn);
         }
 

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