Branch: refs/heads/main
Home: https://github.com/WebKit/WebKit
Commit: a068c52c28a8dbb7a2e8a8a544856092657b2b06
https://github.com/WebKit/WebKit/commit/a068c52c28a8dbb7a2e8a8a544856092657b2b06
Author: Yijia Huang <hyjo...@gmail.com>
Date: 2022-12-15 (Thu, 15 Dec 2022)
Changed paths:
M Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h
M Source/JavaScriptCore/assembler/X86Assembler.h
M Source/JavaScriptCore/b3/air/AirOpcode.opcodes
M Source/JavaScriptCore/wasm/WasmAirIRGenerator64.cpp
Log Message:
-----------
[SIMD] Intel support for the remaining conversion opcodes
https://bugs.webkit.org/show_bug.cgi?id=249418
rdar://103411760
Reviewed by Yusuke Suzuki.
Add support for conversion operations:
- i32x4.trunc_sat_f32x4_s(a: v128) -> v128
- i32x4.trunc_sat_f32x4_u(a: v128) -> v128
- f32x4.convert_i32x4_u(a: v128) -> v128
https://github.com/WebAssembly/simd/blob/main/proposals/simd/SIMD.md#conversions
* Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h:
(JSC::MacroAssemblerX86_64::vectorTruncSat):
(JSC::MacroAssemblerX86_64::vectorTruncSatUnsignedFloat32):
(JSC::MacroAssemblerX86_64::vectorConvertUnsigned):
(JSC::MacroAssemblerX86_64::vectorMulSat):
* Source/JavaScriptCore/assembler/X86Assembler.h:
(JSC::X86Assembler::pblendw_i8rr):
(JSC::X86Assembler::vmaxps_rrr):
(JSC::X86Assembler::vmaxpd_rrr):
(JSC::X86Assembler::vminps_rrr):
(JSC::X86Assembler::vminpd_rrr):
(JSC::X86Assembler::vcmpunordps_rrr):
(JSC::X86Assembler::vcmpleps_rrr):
(JSC::X86Assembler::vcmpltps_rrr):
(JSC::X86Assembler::vcvttps2dq_rr):
(JSC::X86Assembler::vpand_rrr):
(JSC::X86Assembler::vpslld_i8rr):
(JSC::X86Assembler::pblendw_rr): Deleted.
* Source/JavaScriptCore/b3/air/AirOpcode.opcodes:
* Source/JavaScriptCore/wasm/WasmAirIRGenerator64.cpp:
(JSC::Wasm::AirIRGenerator64::addSIMDV_V):
(JSC::Wasm::AirIRGenerator64::addSIMDRelOp):
Canonical link: https://commits.webkit.org/257965@main
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