Modified: trunk/Source/_javascript_Core/ChangeLog (110043 => 110044)
--- trunk/Source/_javascript_Core/ChangeLog 2012-03-07 10:50:51 UTC (rev 110043)
+++ trunk/Source/_javascript_Core/ChangeLog 2012-03-07 11:30:29 UTC (rev 110044)
@@ -1,3 +1,18 @@
+2012-03-07 Simon Hausmann <simon.hausm...@nokia.com>
+
+ ARM build fix.
+
+ Reviewed by Zoltan Herczeg.
+
+ Implement three-argument branch(Add,Sub)32.
+
+ * assembler/MacroAssemblerARM.h:
+ (JSC::MacroAssemblerARM::add32):
+ (MacroAssemblerARM):
+ (JSC::MacroAssemblerARM::sub32):
+ (JSC::MacroAssemblerARM::branchAdd32):
+ (JSC::MacroAssemblerARM::branchSub32):
+
2012-03-07 Andy Wingo <wi...@igalia.com>
Parser: Inline ScopeNodeData into ScopeNode
Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerARM.h (110043 => 110044)
--- trunk/Source/_javascript_Core/assembler/MacroAssemblerARM.h 2012-03-07 10:50:51 UTC (rev 110043)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerARM.h 2012-03-07 11:30:29 UTC (rev 110044)
@@ -108,6 +108,11 @@
add32(ARMRegisters::S1, dest);
}
+ void add32(RegisterID src, TrustedImm32 imm, RegisterID dest)
+ {
+ m_assembler.adds_r(dest, src, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
+ }
+
void and32(RegisterID src, RegisterID dest)
{
m_assembler.ands_r(dest, dest, src);
@@ -236,6 +241,11 @@
sub32(ARMRegisters::S1, dest);
}
+ void sub32(RegisterID src, TrustedImm32 imm, RegisterID dest)
+ {
+ m_assembler.subs_r(dest, src, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
+ }
+
void xor32(RegisterID src, RegisterID dest)
{
m_assembler.eors_r(dest, dest, src);
@@ -554,6 +564,13 @@
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
+ Jump branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
+ {
+ ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
+ add32(src, imm, dest);
+ return Jump(m_assembler.jmp(ARMCondition(cond)));
+ }
+
void mull32(RegisterID src1, RegisterID src2, RegisterID dest)
{
if (src1 == dest) {
@@ -603,6 +620,13 @@
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
+ Jump branchSub32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
+ {
+ ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
+ sub32(src, imm, dest);
+ return Jump(m_assembler.jmp(ARMCondition(cond)));
+ }
+
Jump branchNeg32(ResultCondition cond, RegisterID srcDest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
