Modified: trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h (115362 => 115363)
--- trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h 2012-04-26 21:15:23 UTC (rev 115362)
+++ trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h 2012-04-26 21:21:56 UTC (rev 115363)
@@ -572,7 +572,9 @@
OP_CMP_reg_T2 = 0xEBB0,
OP_VMOV_CtoD = 0xEC00,
OP_VMOV_DtoC = 0xEC10,
+ OP_FSTS = 0xED00,
OP_VSTR = 0xED00,
+ OP_FLDS = 0xED10,
OP_VLDR = 0xED10,
OP_VMOV_CtoS = 0xEE00,
OP_VMOV_StoC = 0xEE10,
@@ -588,6 +590,8 @@
OP_VMRS = 0xEEB0,
OP_VNEG_T2 = 0xEEB0,
OP_VSQRT_T1 = 0xEEB0,
+ OP_VCVTSD_T1 = 0xEEB0,
+ OP_VCVTDS_T1 = 0xEEB0,
OP_B_T3a = 0xF000,
OP_B_T4a = 0xF000,
OP_AND_imm_T1 = 0xF000,
@@ -642,10 +646,12 @@
typedef enum {
OP_VADD_T2b = 0x0A00,
OP_VDIVb = 0x0A00,
+ OP_FLDSb = 0x0A00,
OP_VLDRb = 0x0A00,
OP_VMOV_IMM_T2b = 0x0A00,
OP_VMOV_T2b = 0x0A40,
OP_VMUL_T2b = 0x0A00,
+ OP_FSTSb = 0x0A00,
OP_VSTRb = 0x0A00,
OP_VMOV_StoCb = 0x0A10,
OP_VMOV_CtoSb = 0x0A10,
@@ -658,6 +664,8 @@
OP_VNEG_T2b = 0x0A40,
OP_VSUB_T2b = 0x0A40,
OP_VSQRT_T1b = 0x0A40,
+ OP_VCVTSD_T1b = 0x0A40,
+ OP_VCVTDS_T1b = 0x0A40,
OP_NOP_T2b = 0x8000,
OP_B_T3b = 0x8000,
OP_B_T4b = 0x9000,
@@ -1720,6 +1728,11 @@
{
m_formatter.vfpMemOp(OP_VLDR, OP_VLDRb, true, rn, rd, imm);
}
+
+ void flds(FPSingleRegisterID rd, RegisterID rn, int32_t imm)
+ {
+ m_formatter.vfpMemOp(OP_FLDS, OP_FLDSb, false, rn, rd, imm);
+ }
void vmov(RegisterID rd, FPSingleRegisterID rn)
{
@@ -1768,6 +1781,11 @@
m_formatter.vfpMemOp(OP_VSTR, OP_VSTRb, true, rn, rd, imm);
}
+ void fsts(FPSingleRegisterID rd, RegisterID rn, int32_t imm)
+ {
+ m_formatter.vfpMemOp(OP_FSTS, OP_FSTSb, false, rn, rd, imm);
+ }
+
void vsub(FPDoubleRegisterID rd, FPDoubleRegisterID rn, FPDoubleRegisterID rm)
{
m_formatter.vfpOp(OP_VSUB_T2, OP_VSUB_T2b, true, rn, rd, rm);
@@ -1787,7 +1805,17 @@
{
m_formatter.vfpOp(OP_VSQRT_T1, OP_VSQRT_T1b, true, VFPOperand(17), rd, rm);
}
+
+ void vcvtds(FPDoubleRegisterID rd, FPSingleRegisterID rm)
+ {
+ m_formatter.vfpOp(OP_VCVTDS_T1, OP_VCVTDS_T1b, false, VFPOperand(23), rd, rm);
+ }
+ void vcvtsd(FPSingleRegisterID rd, FPDoubleRegisterID rm)
+ {
+ m_formatter.vfpOp(OP_VCVTSD_T1, OP_VCVTSD_T1b, true, VFPOperand(23), rd, rm);
+ }
+
void nop()
{
m_formatter.oneWordOp8Imm8(OP_NOP_T1, 0);
Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerARMv7.h (115362 => 115363)
--- trunk/Source/_javascript_Core/assembler/MacroAssemblerARMv7.h 2012-04-26 21:15:23 UTC (rev 115362)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerARMv7.h 2012-04-26 21:21:56 UTC (rev 115363)
@@ -770,6 +770,21 @@
m_assembler.vldr(dest, base, offset);
}
+ void loadFloat(ImplicitAddress address, FPRegisterID dest)
+ {
+ RegisterID base = address.base;
+ int32_t offset = address.offset;
+
+ // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
+ if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
+ add32(TrustedImm32(offset), base, addressTempRegister);
+ base = addressTempRegister;
+ offset = 0;
+ }
+
+ m_assembler.flds(ARMRegisters::asSingle(dest), base, offset);
+ }
+
void loadDouble(BaseIndex address, FPRegisterID dest)
{
move(address.index, addressTempRegister);
@@ -780,9 +795,10 @@
void loadFloat(BaseIndex address, FPRegisterID dest)
{
- UNUSED_PARAM(address);
- UNUSED_PARAM(dest);
- unreachableForPlatform();
+ move(address.index, addressTempRegister);
+ lshift32(TrustedImm32(address.scale), addressTempRegister);
+ add32(address.base, addressTempRegister);
+ loadFloat(Address(addressTempRegister, address.offset), dest);
}
void moveDouble(FPRegisterID src, FPRegisterID dest)
@@ -812,6 +828,21 @@
m_assembler.vstr(src, base, offset);
}
+ void storeFloat(FPRegisterID src, ImplicitAddress address)
+ {
+ RegisterID base = address.base;
+ int32_t offset = address.offset;
+
+ // Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
+ if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
+ add32(TrustedImm32(offset), base, addressTempRegister);
+ base = addressTempRegister;
+ offset = 0;
+ }
+
+ m_assembler.fsts(ARMRegisters::asSingle(src), base, offset);
+ }
+
void storeDouble(FPRegisterID src, const void* address)
{
move(TrustedImmPtr(address), addressTempRegister);
@@ -829,11 +860,11 @@
void storeFloat(FPRegisterID src, BaseIndex address)
{
move(address.index, addressTempRegister);
- mul32(TrustedImm32(1 << address.scale), addressTempRegister, addressTempRegister);
+ lshift32(TrustedImm32(address.scale), addressTempRegister);
add32(address.base, addressTempRegister);
- storeDouble(src, Address(addressTempRegister, address.offset));
+ storeFloat(src, Address(addressTempRegister, address.offset));
}
-
+
void addDouble(FPRegisterID src, FPRegisterID dest)
{
m_assembler.vadd(dest, dest, src);
@@ -937,16 +968,12 @@
void convertFloatToDouble(FPRegisterID src, FPRegisterID dst)
{
- UNUSED_PARAM(src);
- UNUSED_PARAM(dst);
- unreachableForPlatform();
+ m_assembler.vcvtds(dst, ARMRegisters::asSingle(src));
}
void convertDoubleToFloat(FPRegisterID src, FPRegisterID dst)
{
- UNUSED_PARAM(src);
- UNUSED_PARAM(dst);
- unreachableForPlatform();
+ m_assembler.vcvtsd(ARMRegisters::asSingle(dst), src);
}
Jump branchDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right)
