Diff
Modified: trunk/Source/_javascript_Core/ChangeLog (158882 => 158883)
--- trunk/Source/_javascript_Core/ChangeLog 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/ChangeLog 2013-11-07 23:45:56 UTC (rev 158883)
@@ -1,3 +1,37 @@
+2013-11-07 Michael Saboff <[email protected]>
+
+ Change CallFrameRegister to architected frame pointer register
+ https://bugs.webkit.org/show_bug.cgi?id=123956
+
+ Reviewed by Geoffrey Garen.
+
+ Changed X86 and ARM variants as well as MIPS to use their respective architected
+ frame pointer registers. The freed up callFrameRegisteris are made available to
+ the DFG register allocator. Modified the FTL OSR exit compiler to use a temporary
+ register as a stand in for the destination callFrameRegister since the FTL frame
+ pointer register is needed to extract values from the FTL stack.
+
+ Reviewed by Geoffrey Garen.
+
+ * assembler/ARMAssembler.h:
+ * assembler/ARMv7Assembler.h:
+ * assembler/MacroAssemblerMIPS.h:
+ * ftl/FTLOSRExitCompiler.cpp:
+ (JSC::FTL::compileStub):
+ * jit/AssemblyHelpers.h:
+ (JSC::AssemblyHelpers::addressFor):
+ * jit/GPRInfo.h:
+ (JSC::GPRInfo::toRegister):
+ (JSC::GPRInfo::toIndex):
+ * jit/JITOperations.cpp:
+ * jit/JSInterfaceJIT.h:
+ * jit/ThunkGenerators.cpp:
+ (JSC::callToJavaScript):
+ * offlineasm/arm.rb:
+ * offlineasm/arm64.rb:
+ * offlineasm/mips.rb:
+ * offlineasm/x86.rb:
+
2013-11-07 Oliver Hunt <[email protected]>
Reproducible crash when using Map (affects Web Inspector)
Modified: trunk/Source/_javascript_Core/assembler/ARMAssembler.h (158882 => 158883)
--- trunk/Source/_javascript_Core/assembler/ARMAssembler.h 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/assembler/ARMAssembler.h 2013-11-07 23:45:56 UTC (rev 158883)
@@ -43,13 +43,13 @@
r2,
r3,
r4,
- r5, fp = r5, // frame pointer
+ r5,
r6, S0 = r6,
r7,
r8,
r9,
r10,
- r11,
+ r11, fp = r11, // frame pointer
r12, ip = r12, S1 = r12,
r13, sp = r13,
r14, lr = r14,
Modified: trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h (158882 => 158883)
--- trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h 2013-11-07 23:45:56 UTC (rev 158883)
@@ -45,11 +45,11 @@
r4,
r5,
r6,
- r7, wr = r7, // thumb work register
+ r7, fp = r7, // frame pointer
r8,
r9, sb = r9, // static base
r10, sl = r10, // stack limit
- r11, fp = r11, // frame pointer
+ r11,
r12, ip = r12,
r13, sp = r13,
r14, lr = r14,
Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerMIPS.h (158882 => 158883)
--- trunk/Source/_javascript_Core/assembler/MacroAssemblerMIPS.h 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerMIPS.h 2013-11-07 23:45:56 UTC (rev 158883)
@@ -101,7 +101,7 @@
};
static const RegisterID stackPointerRegister = MIPSRegisters::sp;
- static const RegisterID framePointerRegister = MIPSRegisters::s0;
+ static const RegisterID framePointerRegister = MIPSRegisters::fp;
static const RegisterID returnAddressRegister = MIPSRegisters::ra;
// Integer arithmetic operations:
Modified: trunk/Source/_javascript_Core/ftl/FTLOSRExitCompiler.cpp (158882 => 158883)
--- trunk/Source/_javascript_Core/ftl/FTLOSRExitCompiler.cpp 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/ftl/FTLOSRExitCompiler.cpp 2013-11-07 23:45:56 UTC (rev 158883)
@@ -55,6 +55,9 @@
RELEASE_ASSERT(record->patchpointID == exit.m_stackmapID);
+ // This code requires framePointerRegister is the same as callFrameRegister
+ static_assert(MacroAssembler::framePointerRegister == GPRInfo::callFrameRegister, "MacroAssembler::framePointerRegister and GPRInfo::callFrameRegister must be the same");
+
CCallHelpers jit(vm, codeBlock);
// We need scratch space to save all registers and to build up the JSStack.
@@ -76,7 +79,8 @@
// call frame.
// Get the call frame and tag thingies.
- record->locations[0].restoreInto(jit, jitCode->stackmaps, registerScratch, GPRInfo::callFrameRegister);
+ // Restore the exiting function's callFrame value into a regT4
+ record->locations[0].restoreInto(jit, jitCode->stackmaps, registerScratch, GPRInfo::regT4);
jit.move(MacroAssembler::TrustedImm64(TagTypeNumber), GPRInfo::tagTypeNumberRegister);
jit.move(MacroAssembler::TrustedImm64(TagMask), GPRInfo::tagMaskRegister);
@@ -126,7 +130,7 @@
case ExitValueInJSStackAsInt32:
case ExitValueInJSStackAsInt52:
case ExitValueInJSStackAsDouble:
- jit.load64(AssemblyHelpers::addressFor(value.virtualRegister()), GPRInfo::regT0);
+ jit.load64(AssemblyHelpers::addressFor(value.virtualRegister(), GPRInfo::regT4), GPRInfo::regT0);
break;
default:
@@ -146,14 +150,19 @@
jit.load64(scratch + index, GPRInfo::regT0);
reboxAccordingToFormat(
value.valueFormat(), jit, GPRInfo::regT0, GPRInfo::regT1, GPRInfo::regT2);
- jit.store64(GPRInfo::regT0, AssemblyHelpers::addressFor(operand));
+ jit.store64(GPRInfo::regT0, AssemblyHelpers::addressFor(static_cast<VirtualRegister>(operand), GPRInfo::regT4));
}
+ // Save the current framePointer into regT3 for the epilogue.
+ // Put regT4 into callFrameRegister
+ jit.move(MacroAssembler::framePointerRegister, GPRInfo::regT3);
+ jit.move(GPRInfo::regT4, GPRInfo::callFrameRegister);
+
handleExitCounts(jit, exit);
reifyInlinedCallFrames(jit, exit);
- jit.move(MacroAssembler::framePointerRegister, MacroAssembler::stackPointerRegister);
- jit.pop(MacroAssembler::framePointerRegister);
+ jit.move(GPRInfo::regT3, MacroAssembler::stackPointerRegister);
+ jit.pop(GPRInfo::regT3); // ignore prior framePointer
jit.pop(GPRInfo::nonArgGPR0); // ignore the result.
if (exit.m_lastSetOperand.isValid()) {
Modified: trunk/Source/_javascript_Core/jit/AssemblyHelpers.h (158882 => 158883)
--- trunk/Source/_javascript_Core/jit/AssemblyHelpers.h 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/jit/AssemblyHelpers.h 2013-11-07 23:45:56 UTC (rev 158883)
@@ -176,6 +176,11 @@
{
return Address(GPRInfo::callFrameRegister, byteOffset);
}
+ static Address addressFor(VirtualRegister virtualRegister, GPRReg baseReg)
+ {
+ ASSERT(virtualRegister.isValid());
+ return Address(baseReg, virtualRegister.offset() * sizeof(Register));
+ }
static Address addressFor(VirtualRegister virtualRegister)
{
ASSERT(virtualRegister.isValid());
Modified: trunk/Source/_javascript_Core/jit/GPRInfo.h (158882 => 158883)
--- trunk/Source/_javascript_Core/jit/GPRInfo.h 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/jit/GPRInfo.h 2013-11-07 23:45:56 UTC (rev 158883)
@@ -284,7 +284,7 @@
class GPRInfo {
public:
typedef GPRReg RegisterType;
- static const unsigned numberOfRegisters = 5;
+ static const unsigned numberOfRegisters = 6;
static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
// Temporary registers.
@@ -292,11 +292,12 @@
static const GPRReg regT1 = X86Registers::edx;
static const GPRReg regT2 = X86Registers::ecx;
static const GPRReg regT3 = X86Registers::ebx;
- static const GPRReg regT4 = X86Registers::esi;
+ static const GPRReg regT4 = X86Registers::edi;
+ static const GPRReg regT5 = X86Registers::esi;
// These registers match the baseline JIT.
static const GPRReg cachedResultRegister = regT0;
static const GPRReg cachedResultRegister2 = regT1;
- static const GPRReg callFrameRegister = X86Registers::edi;
+ static const GPRReg callFrameRegister = X86Registers::ebp;
// These constants provide the names for the general purpose argument & return value registers.
static const GPRReg argumentGPR0 = X86Registers::ecx; // regT2
static const GPRReg argumentGPR1 = X86Registers::edx; // regT1
@@ -310,7 +311,7 @@
static GPRReg toRegister(unsigned index)
{
ASSERT(index < numberOfRegisters);
- static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4 };
+ static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5 };
return registerForIndex[index];
}
@@ -318,7 +319,7 @@
{
ASSERT(reg != InvalidGPRReg);
ASSERT(static_cast<int>(reg) < 8);
- static const unsigned indexForRegister[8] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 4, InvalidIndex };
+ static const unsigned indexForRegister[8] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 5, 4 };
unsigned result = indexForRegister[reg];
ASSERT(result != InvalidIndex);
return result;
@@ -347,12 +348,12 @@
class GPRInfo {
public:
typedef GPRReg RegisterType;
- static const unsigned numberOfRegisters = 9;
+ static const unsigned numberOfRegisters = 10;
static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
// These registers match the baseline JIT.
static const GPRReg cachedResultRegister = X86Registers::eax;
- static const GPRReg callFrameRegister = X86Registers::r13;
+ static const GPRReg callFrameRegister = X86Registers::ebp;
static const GPRReg tagTypeNumberRegister = X86Registers::r14;
static const GPRReg tagMaskRegister = X86Registers::r15;
// Temporary registers.
@@ -365,6 +366,7 @@
static const GPRReg regT6 = X86Registers::r8;
static const GPRReg regT7 = X86Registers::r9;
static const GPRReg regT8 = X86Registers::r10;
+ static const GPRReg regT9 = X86Registers::r13;
// These constants provide the names for the general purpose argument & return value registers.
static const GPRReg argumentGPR0 = X86Registers::edi; // regT4
static const GPRReg argumentGPR1 = X86Registers::esi; // regT5
@@ -382,7 +384,7 @@
static GPRReg toRegister(unsigned index)
{
ASSERT(index < numberOfRegisters);
- static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regT8 };
+ static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regT8, regT9 };
return registerForIndex[index];
}
@@ -397,7 +399,7 @@
{
ASSERT(reg != InvalidGPRReg);
ASSERT(static_cast<int>(reg) < 16);
- static const unsigned indexForRegister[16] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 5, 4, 6, 7, 8, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
+ static const unsigned indexForRegister[16] = { 0, 2, 1, 3, InvalidIndex, InvalidIndex, 5, 4, 6, 7, 8, InvalidIndex, InvalidIndex, 9, InvalidIndex, InvalidIndex };
unsigned result = indexForRegister[reg];
ASSERT(result != InvalidIndex);
return result;
@@ -428,7 +430,7 @@
class GPRInfo {
public:
typedef GPRReg RegisterType;
- static const unsigned numberOfRegisters = 9;
+ static const unsigned numberOfRegisters = 10;
static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
// Temporary registers.
@@ -441,10 +443,11 @@
static const GPRReg regT6 = ARMRegisters::r10;
static const GPRReg regT7 = ARMRegisters::r11;
static const GPRReg regT8 = ARMRegisters::r3;
+ static const GPRReg regT9 = ARMRegisters::r5;
// These registers match the baseline JIT.
static const GPRReg cachedResultRegister = regT0;
static const GPRReg cachedResultRegister2 = regT1;
- static const GPRReg callFrameRegister = ARMRegisters::r5;
+ static const GPRReg callFrameRegister = ARMRegisters::fp;
// These constants provide the names for the general purpose argument & return value registers.
static const GPRReg argumentGPR0 = ARMRegisters::r0; // regT0
static const GPRReg argumentGPR1 = ARMRegisters::r1; // regT1
@@ -460,7 +463,7 @@
static GPRReg toRegister(unsigned index)
{
ASSERT(index < numberOfRegisters);
- static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regT8 };
+ static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6, regT7, regT8, regT9 };
return registerForIndex[index];
}
@@ -468,7 +471,7 @@
{
ASSERT(static_cast<unsigned>(reg) != InvalidGPRReg);
ASSERT(static_cast<unsigned>(reg) < 16);
- static const unsigned indexForRegister[16] = { 0, 1, 2, 8, 3, InvalidIndex, InvalidIndex, InvalidIndex, 4, 5, 6, 7, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
+ static const unsigned indexForRegister[16] = { 0, 1, 2, 8, 3, 9, InvalidIndex, InvalidIndex, 4, 5, 6, 7, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };
unsigned result = indexForRegister[reg];
ASSERT(result != InvalidIndex);
return result;
@@ -504,7 +507,7 @@
// These registers match the baseline JIT.
static const GPRReg cachedResultRegister = ARM64Registers::x0;
static const GPRReg timeoutCheckRegister = ARM64Registers::x26;
- static const GPRReg callFrameRegister = ARM64Registers::x25;
+ static const GPRReg callFrameRegister = ARM64Registers::fp;
static const GPRReg tagTypeNumberRegister = ARM64Registers::x27;
static const GPRReg tagMaskRegister = ARM64Registers::x28;
// Temporary registers.
@@ -592,7 +595,7 @@
class GPRInfo {
public:
typedef GPRReg RegisterType;
- static const unsigned numberOfRegisters = 6;
+ static const unsigned numberOfRegisters = 7;
static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
// Temporary registers.
@@ -602,10 +605,11 @@
static const GPRReg regT3 = MIPSRegisters::s2;
static const GPRReg regT4 = MIPSRegisters::t5;
static const GPRReg regT5 = MIPSRegisters::t6;
+ static const GPRReg regT6 = MIPSRegisters::s0;
// These registers match the baseline JIT.
static const GPRReg cachedResultRegister = regT0;
static const GPRReg cachedResultRegister2 = regT1;
- static const GPRReg callFrameRegister = MIPSRegisters::s0;
+ static const GPRReg callFrameRegister = MIPSRegisters::fp;
// These constants provide the names for the general purpose argument & return value registers.
static const GPRReg argumentGPR0 = MIPSRegisters::a0;
static const GPRReg argumentGPR1 = MIPSRegisters::a1;
@@ -621,7 +625,7 @@
static GPRReg toRegister(unsigned index)
{
ASSERT(index < numberOfRegisters);
- static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5 };
+ static const GPRReg registerForIndex[numberOfRegisters] = { regT0, regT1, regT2, regT3, regT4, regT5, regT6 };
return registerForIndex[index];
}
@@ -632,7 +636,7 @@
static const unsigned indexForRegister[24] = {
InvalidIndex, InvalidIndex, 0, 1, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex,
InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, 2, 4, 5, InvalidIndex,
- InvalidIndex, InvalidIndex, 3, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex
+ 6, InvalidIndex, 3, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex
};
unsigned result = indexForRegister[reg];
ASSERT(result != InvalidIndex);
Modified: trunk/Source/_javascript_Core/jit/JITOperations.cpp (158882 => 158883)
--- trunk/Source/_javascript_Core/jit/JITOperations.cpp 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/jit/JITOperations.cpp 2013-11-07 23:45:56 UTC (rev 158883)
@@ -1717,8 +1717,8 @@
".globl " SYMBOL_STRING(getHostCallReturnValue) "\n"
HIDE_SYMBOL(getHostCallReturnValue) "\n"
SYMBOL_STRING(getHostCallReturnValue) ":" "\n"
- "mov 0(%r13), %r13\n" // CallerFrameAndPC::callerFrame
- "mov %r13, %rdi\n"
+ "mov 0(%rbp), %rbp\n" // CallerFrameAndPC::callerFrame
+ "mov %rbp, %rdi\n"
"jmp " LOCAL_REFERENCE(getHostCallReturnValueWithExecState) "\n"
);
@@ -1728,8 +1728,8 @@
".globl " SYMBOL_STRING(getHostCallReturnValue) "\n"
HIDE_SYMBOL(getHostCallReturnValue) "\n"
SYMBOL_STRING(getHostCallReturnValue) ":" "\n"
- "mov 0(%edi), %edi\n" // CallerFrameAndPC::callerFrame
- "mov %edi, 4(%esp)\n"
+ "mov 0(%ebp), %ebp\n" // CallerFrameAndPC::callerFrame
+ "mov %ebp, 4(%esp)\n"
"jmp " LOCAL_REFERENCE(getHostCallReturnValueWithExecState) "\n"
);
Modified: trunk/Source/_javascript_Core/jit/JSInterfaceJIT.h (158882 => 158883)
--- trunk/Source/_javascript_Core/jit/JSInterfaceJIT.h 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/jit/JSInterfaceJIT.h 2013-11-07 23:45:56 UTC (rev 158883)
@@ -73,7 +73,7 @@
static const RegisterID thirdArgumentRegister = X86Registers::r8;
#endif
- static const RegisterID callFrameRegister = X86Registers::r13;
+ static const RegisterID callFrameRegister = X86Registers::ebp;
static const RegisterID tagTypeNumberRegister = X86Registers::r14;
static const RegisterID tagMaskRegister = X86Registers::r15;
@@ -98,7 +98,7 @@
static const RegisterID firstArgumentRegister = X86Registers::ecx;
static const RegisterID secondArgumentRegister = X86Registers::edx;
- static const RegisterID callFrameRegister = X86Registers::edi;
+ static const RegisterID callFrameRegister = X86Registers::ebp;
static const RegisterID regT0 = X86Registers::eax;
static const RegisterID regT1 = X86Registers::edx;
@@ -124,7 +124,7 @@
static const RegisterID regT4 = ARMRegisters::r7;
static const RegisterID regT5 = ARMRegisters::r8;
- static const RegisterID callFrameRegister = ARMRegisters::r5;
+ static const RegisterID callFrameRegister = ARMRegisters::fp;
static const FPRegisterID fpRegT0 = ARMRegisters::d0;
static const FPRegisterID fpRegT1 = ARMRegisters::d1;
@@ -146,7 +146,7 @@
static const RegisterID regT3 = ARM64Registers::x23;
static const RegisterID regT4 = ARM64Registers::x24;
- static const RegisterID callFrameRegister = ARM64Registers::x25;
+ static const RegisterID callFrameRegister = ARM64Registers::fp;
static const RegisterID timeoutCheckRegister = ARM64Registers::x26;
static const RegisterID tagTypeNumberRegister = ARM64Registers::x27;
static const RegisterID tagMaskRegister = ARM64Registers::x28;
@@ -178,7 +178,7 @@
static const RegisterID regT4 = MIPSRegisters::t5;
static const RegisterID regT5 = MIPSRegisters::t6;
- static const RegisterID callFrameRegister = MIPSRegisters::s0;
+ static const RegisterID callFrameRegister = MIPSRegisters::fp;
static const FPRegisterID fpRegT0 = MIPSRegisters::f4;
static const FPRegisterID fpRegT1 = MIPSRegisters::f6;
Modified: trunk/Source/_javascript_Core/jit/ThunkGenerators.cpp (158882 => 158883)
--- trunk/Source/_javascript_Core/jit/ThunkGenerators.cpp 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/jit/ThunkGenerators.cpp 2013-11-07 23:45:56 UTC (rev 158883)
@@ -221,11 +221,11 @@
jit.push(ARMRegisters::r10);
jit.push(ARMRegisters::r11);
jit.push(ARMRegisters::lr);
-
+ jit.move(ARMRegisters::r11, GPRInfo::nonArgGPR0);
jit.subPtr(CCallHelpers::TrustedImm32(EXTRA_STACK_SIZE), ARMRegisters::sp);
# define CALLFRAME_SRC_REG GPRInfo::argumentGPR1
-# define PREVIOUS_CALLFRAME_REG ARMRegisters::r11
+# define PREVIOUS_CALLFRAME_REG GPRInfo::nonArgGPR0
#elif CPU(ARM_THUMB2)
jit.push(ARMRegisters::lr);
jit.push(ARMRegisters::r4);
@@ -236,10 +236,11 @@
jit.push(ARMRegisters::r9);
jit.push(ARMRegisters::r10);
jit.push(ARMRegisters::r11);
+ jit.move(ARMRegisters::r7, GPRInfo::nonArgGPR0);
jit.subPtr(CCallHelpers::TrustedImm32(EXTRA_STACK_SIZE), ARMRegisters::sp);
# define CALLFRAME_SRC_REG GPRInfo::argumentGPR1
-# define PREVIOUS_CALLFRAME_REG ARMRegisters::r7
+# define PREVIOUS_CALLFRAME_REG GPRInfo::nonArgGPR0
#elif CPU(ARM64)
jit.push(ARM64Registers::lr);
jit.push(ARM64Registers::x19);
@@ -253,9 +254,10 @@
jit.push(ARM64Registers::x27);
jit.push(ARM64Registers::x28);
jit.push(ARM64Registers::x29);
+ jit.move(ARM64Registers::x29, GPRInfo::nonArgGPR0);
# define CALLFRAME_SRC_REG GPRInfo::argumentGPR1
-# define PREVIOUS_CALLFRAME_REG ARM64Registers::x29
+# define PREVIOUS_CALLFRAME_REG GPRInfo::nonArgGPR0
#elif CPU(MIPS)
jit.subPtr(CCallHelpers::TrustedImm32(STACK_LENGTH), MIPSRegisters::sp);
jit.storePtr(MIPSRegisters::ra, CCallHelpers::Address(MIPSRegisters::sp, PRESERVED_RETURN_ADDRESS_OFFSET));
@@ -267,9 +269,10 @@
#if WTF_MIPS_PIC
jit.storePtr(MIPSRegisters::gp), CCallHelpers::Address(MIPSRegisters::sp, PRESERVED_GP_OFFSET));
#endif
+ jit.move(MIPSRegisters::fp, GPRInfo::nonArgGPR0);
# define CALLFRAME_SRC_REG GPRInfo::argumentGPR1
-# define PREVIOUS_CALLFRAME_REG MIPSRegisters::fp
+# define PREVIOUS_CALLFRAME_REG GPRInfo::nonArgGPR0
#elif CPU(SH4)
jit.push(SH4Registers::fp);
jit.push(SH4Registers::pr);
Modified: trunk/Source/_javascript_Core/offlineasm/arm.rb (158882 => 158883)
--- trunk/Source/_javascript_Core/offlineasm/arm.rb 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/offlineasm/arm.rb 2013-11-07 23:45:56 UTC (rev 158883)
@@ -99,7 +99,7 @@
when "t4"
"r10"
when "cfr"
- "r5"
+ isARMv7 ? "r7" : "r11"
when "lr"
"lr"
when "sp"
Modified: trunk/Source/_javascript_Core/offlineasm/arm64.rb (158882 => 158883)
--- trunk/Source/_javascript_Core/offlineasm/arm64.rb 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/offlineasm/arm64.rb 2013-11-07 23:45:56 UTC (rev 158883)
@@ -117,7 +117,7 @@
when 't6'
arm64GPRName('x12', kind)
when 'cfr'
- arm64GPRName('x25', kind)
+ arm64GPRName('x29', kind)
when 'csr1'
arm64GPRName('x27', kind)
when 'csr2'
Modified: trunk/Source/_javascript_Core/offlineasm/mips.rb (158882 => 158883)
--- trunk/Source/_javascript_Core/offlineasm/mips.rb 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/offlineasm/mips.rb 2013-11-07 23:45:56 UTC (rev 158883)
@@ -101,7 +101,7 @@
when "t8"
"$t8"
when "cfr"
- "$s0"
+ "$fp"
when "lr"
"$ra"
when "sp"
Modified: trunk/Source/_javascript_Core/offlineasm/x86.rb (158882 => 158883)
--- trunk/Source/_javascript_Core/offlineasm/x86.rb 2013-11-07 23:40:44 UTC (rev 158882)
+++ trunk/Source/_javascript_Core/offlineasm/x86.rb 2013-11-07 23:45:56 UTC (rev 158883)
@@ -166,26 +166,24 @@
if isX64
case kind
when :half
- "%r13w"
+ "%bp"
when :int
- "%r13d"
+ "%ebp"
when :ptr
- "%r13"
+ "%rbp"
when :quad
- "%r13"
+ "%rbp"
else
raise
end
else
case kind
- when :byte
- "%dil"
when :half
- "%di"
+ "%bp"
when :int
- "%edi"
+ "%ebp"
when :ptr
- "%edi"
+ "%ebp"
else
raise
end
