Diff
Modified: trunk/Source/_javascript_Core/ChangeLog (164672 => 164673)
--- trunk/Source/_javascript_Core/ChangeLog 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/_javascript_Core/ChangeLog 2014-02-25 22:18:21 UTC (rev 164673)
@@ -1,3 +1,26 @@
+2014-02-25 Filip Pizlo <[email protected]>
+
+ Inline caching in the FTL on ARM64 should "work"
+ https://bugs.webkit.org/show_bug.cgi?id=129334
+
+ Reviewed by Mark Hahnenberg.
+
+ Gets us to the point where simple tests that use inline caching are passing.
+
+ * assembler/LinkBuffer.cpp:
+ (JSC::LinkBuffer::copyCompactAndLinkCode):
+ (JSC::LinkBuffer::shrink):
+ * ftl/FTLInlineCacheSize.cpp:
+ (JSC::FTL::sizeOfGetById):
+ (JSC::FTL::sizeOfPutById):
+ (JSC::FTL::sizeOfCall):
+ * ftl/FTLOSRExitCompiler.cpp:
+ (JSC::FTL::compileFTLOSRExit):
+ * ftl/FTLThunks.cpp:
+ (JSC::FTL::osrExitGenerationThunkGenerator):
+ * jit/GPRInfo.h:
+ * offlineasm/arm64.rb:
+
2014-02-25 Commit Queue <[email protected]>
Unreviewed, rolling out r164627.
Modified: trunk/Source/_javascript_Core/assembler/LinkBuffer.cpp (164672 => 164673)
--- trunk/Source/_javascript_Core/assembler/LinkBuffer.cpp 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/_javascript_Core/assembler/LinkBuffer.cpp 2014-02-25 22:18:21 UTC (rev 164673)
@@ -82,6 +82,8 @@
{
m_initialSize = m_assembler->m_assembler.codeSize();
allocate(m_initialSize, ownerUID, effort);
+ if (didFailToAllocate())
+ return;
uint8_t* inData = (uint8_t*)m_assembler->unlinkedCode();
uint8_t* outData = reinterpret_cast<uint8_t*>(m_code);
int readPtr = 0;
@@ -196,6 +198,8 @@
void LinkBuffer::shrink(size_t newSize)
{
+ if (!m_executableMemory)
+ return;
m_size = newSize;
m_executableMemory->shrink(m_size);
}
Modified: trunk/Source/_javascript_Core/ftl/FTLInlineCacheSize.cpp (164672 => 164673)
--- trunk/Source/_javascript_Core/ftl/FTLInlineCacheSize.cpp 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/_javascript_Core/ftl/FTLInlineCacheSize.cpp 2014-02-25 22:18:21 UTC (rev 164673)
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2013 Apple Inc. All rights reserved.
+ * Copyright (C) 2013, 2014 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -33,23 +33,41 @@
namespace JSC { namespace FTL {
-// These sizes are x86-64-specific, and were found empirically. They have to cover the worst
-// possible combination of registers leading to the largest possible encoding of each
-// instruction in the IC.
+// The default sizes are x86-64-specific, and were found empirically. They have to cover the worst
+// possible combination of registers leading to the largest possible encoding of each instruction in
+// the IC.
+//
+// FIXME: The ARM64 sizes are overestimates; if there is any branch compaction then we should be able
+// to get away with less. The branch compaction code currently validates the size of the IC before
+// doing any compaction, so we need to overestimate and give the uncompacted size. This would be
+// relatively easy to fix.
+// https://bugs.webkit.org/show_bug.cgi?id=129335
size_t sizeOfGetById()
{
+#if CPU(ARM64)
+ return 36;
+#else
return 30;
+#endif
}
size_t sizeOfPutById()
{
+#if CPU(ARM64)
+ return 44;
+#else
return 32;
+#endif
}
size_t sizeOfCall()
{
+#if CPU(ARM64)
+ return 44;
+#else
return 43;
+#endif
}
} } // namespace JSC::FTL
Modified: trunk/Source/_javascript_Core/ftl/FTLOSRExitCompiler.cpp (164672 => 164673)
--- trunk/Source/_javascript_Core/ftl/FTLOSRExitCompiler.cpp 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/_javascript_Core/ftl/FTLOSRExitCompiler.cpp 2014-02-25 22:18:21 UTC (rev 164673)
@@ -354,6 +354,8 @@
{
SamplingRegion samplingRegion("FTL OSR Exit Compilation");
+ dataLog("Compiling OSR exit with exitID = ", exitID, "\n");
+
CodeBlock* codeBlock = exec->codeBlock();
ASSERT(codeBlock);
Modified: trunk/Source/_javascript_Core/ftl/FTLThunks.cpp (164672 => 164673)
--- trunk/Source/_javascript_Core/ftl/FTLThunks.cpp 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/_javascript_Core/ftl/FTLThunks.cpp 2014-02-25 22:18:21 UTC (rev 164673)
@@ -70,7 +70,9 @@
jit.storePtr(MacroAssembler::TrustedImmPtr(requiredScratchMemorySizeInBytes()), GPRInfo::nonArgGPR1);
jit.loadPtr(GPRInfo::callFrameRegister, GPRInfo::argumentGPR0);
- jit.peek(GPRInfo::argumentGPR1, (stackMisalignment / sizeof(void*)) - 1);
+ jit.peek(
+ GPRInfo::argumentGPR1,
+ (stackMisalignment - MacroAssembler::pushToSaveByteOffset()) / sizeof(void*));
MacroAssembler::Call functionCall = jit.call();
// At this point we want to make a tail call to what was returned to us in the
Modified: trunk/Source/_javascript_Core/jit/GPRInfo.h (164672 => 164673)
--- trunk/Source/_javascript_Core/jit/GPRInfo.h 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/_javascript_Core/jit/GPRInfo.h 2014-02-25 22:18:21 UTC (rev 164673)
@@ -548,8 +548,8 @@
static const GPRReg regT1 = ARM64Registers::x1;
static const GPRReg regT2 = ARM64Registers::x2;
static const GPRReg regT3 = ARM64Registers::x23;
- static const GPRReg regT4 = ARM64Registers::x24;
- static const GPRReg regT5 = ARM64Registers::x5;
+ static const GPRReg regT4 = ARM64Registers::x5;
+ static const GPRReg regT5 = ARM64Registers::x24;
static const GPRReg regT6 = ARM64Registers::x6;
static const GPRReg regT7 = ARM64Registers::x7;
static const GPRReg regT8 = ARM64Registers::x8;
@@ -564,9 +564,9 @@
static const GPRReg argumentGPR0 = ARM64Registers::x0; // regT0
static const GPRReg argumentGPR1 = ARM64Registers::x1; // regT1
static const GPRReg argumentGPR2 = ARM64Registers::x2; // regT2
- static const GPRReg argumentGPR3 = ARM64Registers::x3; // regT3
- static const GPRReg argumentGPR4 = ARM64Registers::x4; // regT4
- static const GPRReg argumentGPR5 = ARM64Registers::x5; // regT5
+ static const GPRReg argumentGPR3 = ARM64Registers::x3;
+ static const GPRReg argumentGPR4 = ARM64Registers::x4;
+ static const GPRReg argumentGPR5 = ARM64Registers::x5; // regT4
static const GPRReg argumentGPR6 = ARM64Registers::x6; // regT6
static const GPRReg argumentGPR7 = ARM64Registers::x7; // regT7
static const GPRReg nonArgGPR0 = ARM64Registers::x8; // regT8
Modified: trunk/Source/_javascript_Core/offlineasm/arm64.rb (164672 => 164673)
--- trunk/Source/_javascript_Core/offlineasm/arm64.rb 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/_javascript_Core/offlineasm/arm64.rb 2014-02-25 22:18:21 UTC (rev 164673)
@@ -40,14 +40,14 @@
# x1 => t1, a1, r1
# x2 => t2, a2
# x3 => a3
-# x5 => t5
+# x5 => t4
# x6 => t6
# x9 => (nonArgGPR1 in baseline)
# x13 => scratch (unused in baseline)
# x16 => scratch
# x17 => scratch
# x23 => t3
-# x24 => t4
+# x24 => t5
# x27 => csr1 (tagTypeNumber)
# x28 => csr2 (tagMask)
# x29 => cfr
@@ -113,9 +113,9 @@
when 't3'
arm64GPRName('x23', kind)
when 't4'
+ arm64GPRName('x5', kind)
+ when 't5'
arm64GPRName('x24', kind)
- when 't5'
- arm64GPRName('x5', kind)
when 't6'
arm64GPRName('x6', kind)
when 'cfr'
