Diff
Modified: trunk/Source/_javascript_Core/ChangeLog (167556 => 167557)
--- trunk/Source/_javascript_Core/ChangeLog 2014-04-20 00:54:04 UTC (rev 167556)
+++ trunk/Source/_javascript_Core/ChangeLog 2014-04-20 01:22:06 UTC (rev 167557)
@@ -1,3 +1,23 @@
+2014-04-19 Benjamin Poulain <[email protected]>
+
+ Make the CSS JIT compile for ARM64
+ https://bugs.webkit.org/show_bug.cgi?id=131834
+
+ Reviewed by Gavin Barraclough.
+
+ Extend the ARM64 MacroAssembler to support the code generation required by
+ the CSS JIT.
+
+ * assembler/MacroAssembler.h:
+ * assembler/MacroAssemblerARM64.h:
+ (JSC::MacroAssemblerARM64::addPtrNoFlags):
+ (JSC::MacroAssemblerARM64::or32):
+ (JSC::MacroAssemblerARM64::branchPtr):
+ (JSC::MacroAssemblerARM64::test32):
+ (JSC::MacroAssemblerARM64::branch):
+ * assembler/MacroAssemblerX86Common.h:
+ (JSC::MacroAssemblerX86Common::test32):
+
2014-04-19 Andreas Kling <[email protected]>
Two little shortcuts to the JSType.
Modified: trunk/Source/_javascript_Core/assembler/MacroAssembler.h (167556 => 167557)
--- trunk/Source/_javascript_Core/assembler/MacroAssembler.h 2014-04-20 00:54:04 UTC (rev 167556)
+++ trunk/Source/_javascript_Core/assembler/MacroAssembler.h 2014-04-20 01:22:06 UTC (rev 167557)
@@ -117,7 +117,7 @@
using MacroAssemblerBase::and32;
using MacroAssemblerBase::branchAdd32;
using MacroAssemblerBase::branchMul32;
-#if CPU(X86_64)
+#if CPU(ARM64) || CPU(X86_64)
using MacroAssemblerBase::branchPtr;
#endif // CPU(X86_64)
using MacroAssemblerBase::branchSub32;
Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerARM64.h (167556 => 167557)
--- trunk/Source/_javascript_Core/assembler/MacroAssemblerARM64.h 2014-04-20 00:54:04 UTC (rev 167556)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerARM64.h 2014-04-20 01:22:06 UTC (rev 167557)
@@ -289,6 +289,11 @@
store64(dataTempRegister, address.m_ptr);
}
+ void addPtrNoFlags(TrustedImm32 imm, RegisterID srcDest)
+ {
+ add64(imm, srcDest);
+ }
+
void add64(Address src, RegisterID dest)
{
load64(src, getCachedDataTempRegisterIDAndInvalidate());
@@ -472,6 +477,13 @@
store32(dataTempRegister, address.m_ptr);
}
+ void or32(TrustedImm32 imm, Address address)
+ {
+ load32(address, getCachedDataTempRegisterIDAndInvalidate());
+ or32(imm, dataTempRegister, dataTempRegister);
+ store32(dataTempRegister, address);
+ }
+
void or64(RegisterID src, RegisterID dest)
{
or64(dest, src, dest);
@@ -1651,6 +1663,12 @@
return branch64(cond, memoryTempRegister, right);
}
+ Jump branchPtr(RelationalCondition cond, BaseIndex left, RegisterID right)
+ {
+ load64(left, getCachedMemoryTempRegisterIDAndInvalidate());
+ return branch64(cond, memoryTempRegister, right);
+ }
+
Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
{
ASSERT(!(0xffffff00 & right.m_value));
@@ -1678,6 +1696,32 @@
return Jump(makeBranch(cond));
}
+ void test32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ {
+ if (mask.m_value == -1)
+ m_assembler.tst<32>(reg, reg);
+ else {
+ bool testedWithImmediate = false;
+ if ((cond == Zero) || (cond == NonZero)) {
+ LogicalImmediate logicalImm = LogicalImmediate::create32(mask.m_value);
+
+ if (logicalImm.isValid()) {
+ m_assembler.tst<32>(reg, logicalImm);
+ testedWithImmediate = true;
+ }
+ }
+ if (!testedWithImmediate) {
+ move(mask, getCachedDataTempRegisterIDAndInvalidate());
+ m_assembler.tst<32>(reg, dataTempRegister);
+ }
+ }
+ }
+
+ Jump branch(ResultCondition cond)
+ {
+ return Jump(makeBranch(cond));
+ }
+
Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
if (mask.m_value == -1) {
Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerX86Common.h (167556 => 167557)
--- trunk/Source/_javascript_Core/assembler/MacroAssemblerX86Common.h 2014-04-20 00:54:04 UTC (rev 167556)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerX86Common.h 2014-04-20 01:22:06 UTC (rev 167557)
@@ -1145,7 +1145,7 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- void test32(RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ void test32(ResultCondition, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
if (mask.m_value == -1)
m_assembler.testl_rr(reg, reg);
@@ -1165,7 +1165,7 @@
Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
- test32(reg, mask);
+ test32(cond, reg, mask);
return branch(cond);
}
Modified: trunk/Source/WebCore/ChangeLog (167556 => 167557)
--- trunk/Source/WebCore/ChangeLog 2014-04-20 00:54:04 UTC (rev 167556)
+++ trunk/Source/WebCore/ChangeLog 2014-04-20 01:22:06 UTC (rev 167557)
@@ -1,3 +1,38 @@
+2014-04-19 Benjamin Poulain <[email protected]>
+
+ Make the CSS JIT compile for ARM64
+ https://bugs.webkit.org/show_bug.cgi?id=131834
+
+ Reviewed by Gavin Barraclough.
+
+ Add the CPU specific code required to compile SelectorCompiler on ARM64.
+ The code is absolutely non-functional, it would crash immediately, but it compiles.
+
+ * cssjit/FunctionCall.h:
+ (WebCore::FunctionCall::FunctionCall):
+ (WebCore::FunctionCall::callAndBranchOnCondition):
+ * cssjit/RegisterAllocator.h:
+ What am I supposed to do with all those registers? There are so many of them :)
+ The array calleeSavedRegisters is defined for compatibility but it cannot be reached at the moment.
+
+ (WebCore::RegisterAllocator::isValidRegister):
+ * cssjit/SelectorCompiler.cpp:
+ (WebCore::SelectorCompiler::SelectorCodeGenerator::modulo):
+ Implement modulo by doing dividend - (divisor * int(dividend/divisor)).
+
+ * cssjit/StackAllocator.h:
+ StackAllocator will need a small redesign to handle the 16 bytes alligned stack of
+ ARM64.
+ The code has been modified to build but it is pretty useless.
+
+ (WebCore::StackAllocator::allocateUninitialized):
+ (WebCore::StackAllocator::push):
+ (WebCore::StackAllocator::pop):
+ (WebCore::StackAllocator::popAndDiscard):
+ (WebCore::StackAllocator::popAndDiscardUpTo):
+ (WebCore::StackAllocator::alignStackPreFunctionCall):
+ (WebCore::StackAllocator::unalignStackPostFunctionCall):
+
2014-04-19 Simon Fraser <[email protected]>
[UI-side compositing] Implement blend modes
Modified: trunk/Source/WebCore/cssjit/FunctionCall.h (167556 => 167557)
--- trunk/Source/WebCore/cssjit/FunctionCall.h 2014-04-20 00:54:04 UTC (rev 167556)
+++ trunk/Source/WebCore/cssjit/FunctionCall.h 2014-04-20 01:22:06 UTC (rev 167557)
@@ -37,7 +37,7 @@
class FunctionCall {
public:
- FunctionCall(JSC::MacroAssembler& assembler, const RegisterAllocator& registerAllocator, StackAllocator& stackAllocator, Vector<std::pair<JSC::MacroAssembler::Call, JSC::FunctionPtr>>& callRegistry)
+ FunctionCall(JSC::MacroAssembler& assembler, RegisterAllocator& registerAllocator, StackAllocator& stackAllocator, Vector<std::pair<JSC::MacroAssembler::Call, JSC::FunctionPtr>>& callRegistry)
: m_assembler(assembler)
, m_registerAllocator(registerAllocator)
, m_stackAllocator(stackAllocator)
@@ -75,7 +75,7 @@
JSC::MacroAssembler::Jump callAndBranchOnCondition(JSC::MacroAssembler::ResultCondition condition)
{
prepareAndCall();
- m_assembler.test32(JSC::GPRInfo::returnValueGPR, JSC::MacroAssembler::TrustedImm32(0xff));
+ m_assembler.test32(condition, JSC::GPRInfo::returnValueGPR, JSC::MacroAssembler::TrustedImm32(0xff));
cleanupPostCall();
return m_assembler.branch(condition);
}
@@ -183,7 +183,7 @@
}
JSC::MacroAssembler& m_assembler;
- const RegisterAllocator& m_registerAllocator;
+ RegisterAllocator& m_registerAllocator;
StackAllocator& m_stackAllocator;
Vector<std::pair<JSC::MacroAssembler::Call, JSC::FunctionPtr>>& m_callRegistry;
Modified: trunk/Source/WebCore/cssjit/RegisterAllocator.h (167556 => 167557)
--- trunk/Source/WebCore/cssjit/RegisterAllocator.h 2014-04-20 00:54:04 UTC (rev 167556)
+++ trunk/Source/WebCore/cssjit/RegisterAllocator.h 2014-04-20 01:22:06 UTC (rev 167557)
@@ -35,8 +35,30 @@
namespace WebCore {
-#if CPU(X86_64)
+#if CPU(ARM64)
static const JSC::MacroAssembler::RegisterID callerSavedRegisters[] = {
+ JSC::ARM64Registers::x0,
+ JSC::ARM64Registers::x1,
+ JSC::ARM64Registers::x2,
+ JSC::ARM64Registers::x3,
+ JSC::ARM64Registers::x4,
+ JSC::ARM64Registers::x5,
+ JSC::ARM64Registers::x6,
+ JSC::ARM64Registers::x7,
+ JSC::ARM64Registers::x8,
+ JSC::ARM64Registers::x9,
+ JSC::ARM64Registers::x10,
+ JSC::ARM64Registers::x11,
+ JSC::ARM64Registers::x12,
+ JSC::ARM64Registers::x13,
+ JSC::ARM64Registers::x14,
+ JSC::ARM64Registers::x15,
+};
+static const JSC::MacroAssembler::RegisterID calleeSavedRegisters[] = {
+ JSC::ARM64Registers::x19
+};
+#elif CPU(X86_64)
+static const JSC::MacroAssembler::RegisterID callerSavedRegisters[] = {
JSC::X86Registers::eax,
JSC::X86Registers::ecx,
JSC::X86Registers::edx,
@@ -53,10 +75,10 @@
JSC::X86Registers::r14,
JSC::X86Registers::r15
};
-static const unsigned registerCount = WTF_ARRAY_LENGTH(callerSavedRegisters) + WTF_ARRAY_LENGTH(calleeSavedRegisters);
#else
#error RegisterAllocator has no defined registers for the architecture.
#endif
+static const unsigned registerCount = WTF_ARRAY_LENGTH(callerSavedRegisters) + WTF_ARRAY_LENGTH(calleeSavedRegisters);
class RegisterAllocator {
public:
@@ -116,7 +138,9 @@
static bool isValidRegister(JSC::MacroAssembler::RegisterID registerID)
{
-#if CPU(X86_64)
+#if CPU(ARM64)
+ return registerID >= JSC::ARM64Registers::x0 && registerID <= JSC::ARM64Registers::x15;
+#elif CPU(X86_64)
return registerID >= JSC::X86Registers::eax && registerID <= JSC::X86Registers::r15;
#else
#error RegisterAllocator does not define the valid register range for the current architecture.
Modified: trunk/Source/WebCore/cssjit/SelectorCompiler.cpp (167556 => 167557)
--- trunk/Source/WebCore/cssjit/SelectorCompiler.cpp 2014-04-20 00:54:04 UTC (rev 167556)
+++ trunk/Source/WebCore/cssjit/SelectorCompiler.cpp 2014-04-20 01:22:06 UTC (rev 167557)
@@ -144,11 +144,9 @@
SelectorCompilationStatus compile(JSC::VM*, JSC::MacroAssemblerCodeRef&);
private:
-#if CPU(X86_64)
- static const Assembler::RegisterID returnRegister = JSC::X86Registers::eax;
- static const Assembler::RegisterID elementAddressRegister = JSC::X86Registers::edi;
- static const Assembler::RegisterID checkingContextRegister = JSC::X86Registers::esi;
-#endif
+ static const Assembler::RegisterID returnRegister = JSC::GPRInfo::returnValueGPR;
+ static const Assembler::RegisterID elementAddressRegister = JSC::GPRInfo::argumentGPR0;
+ static const Assembler::RegisterID checkingContextRegister = JSC::GPRInfo::argumentGPR1;
void computeBacktrackingInformation();
void generateSelectorChecker();
@@ -928,7 +926,15 @@
Assembler::Jump SelectorCodeGenerator::modulo(Assembler::ResultCondition condition, Assembler::RegisterID inputDividend, int divisor)
{
RELEASE_ASSERT(divisor);
-#if CPU(X86_64)
+#if CPU(ARM64)
+ LocalRegister divisorRegister(m_registerAllocator);
+ m_assembler.move(Assembler::TrustedImm32(divisor), divisorRegister);
+
+ LocalRegister resultRegister(m_registerAllocator);
+ m_assembler.m_assembler.sdiv<32>(resultRegister, inputDividend, divisorRegister);
+ m_assembler.mul32(divisorRegister, resultRegister);
+ return m_assembler.branchSub32(condition, inputDividend, resultRegister, resultRegister);
+#elif CPU(X86_64)
// idiv takes RAX + an arbitrary register, and return RAX + RDX. Most of this code is about doing
// an efficient allocation of those registers. If a register is already in use and is not the inputDividend,
// we first try to copy it to a temporary register, it that is not possible we fall back to the stack.
@@ -990,7 +996,7 @@
LocalRegister divisorRegister(m_registerAllocator);
m_assembler.move(Assembler::TrustedImm64(divisor), divisorRegister);
m_assembler.m_assembler.idivl_r(divisorRegister);
- m_assembler.test32(remainder);
+ m_assembler.test32(condition, remainder);
}
// 3) Return RAX and RDX.
Modified: trunk/Source/WebCore/cssjit/StackAllocator.h (167556 => 167557)
--- trunk/Source/WebCore/cssjit/StackAllocator.h 2014-04-20 00:54:04 UTC (rev 167556)
+++ trunk/Source/WebCore/cssjit/StackAllocator.h 2014-04-20 01:22:06 UTC (rev 167557)
@@ -63,16 +63,21 @@
StackReference allocateUninitialized()
{
RELEASE_ASSERT(!m_hasFunctionCallPadding);
- m_assembler.addPtrNoFlags(JSC::MacroAssembler::TrustedImm32(-8), JSC::MacroAssembler::stackPointerRegister);
- m_offsetFromTop += 8;
+ m_assembler.addPtrNoFlags(JSC::MacroAssembler::TrustedImm32(-stackUnitInBytes), JSC::MacroAssembler::stackPointerRegister);
+ m_offsetFromTop += stackUnitInBytes;
return StackReference(m_offsetFromTop);
}
+ // FIXME: ARM64 needs an API take a list of register to push and pop to use strp and ldrp when possible.
StackReference push(JSC::MacroAssembler::RegisterID registerID)
{
RELEASE_ASSERT(!m_hasFunctionCallPadding);
+#if CPU(ARM64)
+ m_assembler.m_assembler.str<64>(registerID, JSC::ARM64Registers::sp, JSC::PreIndex(-16));
+#else
m_assembler.push(registerID);
- m_offsetFromTop += 8;
+#endif
+ m_offsetFromTop += stackUnitInBytes;
return StackReference(m_offsetFromTop);
}
@@ -81,20 +86,24 @@
RELEASE_ASSERT(stackReference == m_offsetFromTop);
RELEASE_ASSERT(!m_hasFunctionCallPadding);
ASSERT(m_offsetFromTop > 0);
- m_offsetFromTop -= 8;
+ m_offsetFromTop -= stackUnitInBytes;
+#if CPU(ARM64)
+ m_assembler.m_assembler.ldr<64>(registerID, JSC::ARM64Registers::sp, JSC::PostIndex(16));
+#else
m_assembler.pop(registerID);
+#endif
}
void popAndDiscard(StackReference stackReference)
{
RELEASE_ASSERT(stackReference == m_offsetFromTop);
- m_assembler.addPtr(JSC::MacroAssembler::TrustedImm32(8), JSC::MacroAssembler::stackPointerRegister);
- m_offsetFromTop -= 8;
+ m_assembler.addPtr(JSC::MacroAssembler::TrustedImm32(stackUnitInBytes), JSC::MacroAssembler::stackPointerRegister);
+ m_offsetFromTop -= stackUnitInBytes;
}
void popAndDiscardUpTo(StackReference stackReference)
{
- unsigned positionBeforeStackReference = stackReference - 8;
+ unsigned positionBeforeStackReference = stackReference - stackUnitInBytes;
RELEASE_ASSERT(positionBeforeStackReference < m_offsetFromTop);
unsigned stackDelta = m_offsetFromTop - positionBeforeStackReference;
@@ -104,20 +113,24 @@
void alignStackPreFunctionCall()
{
+#if CPU(X86_64)
RELEASE_ASSERT(!m_hasFunctionCallPadding);
- unsigned topAlignment = 8;
+ unsigned topAlignment = stackUnitInBytes;
if ((topAlignment + m_offsetFromTop) % 16) {
m_hasFunctionCallPadding = true;
- m_assembler.addPtrNoFlags(JSC::MacroAssembler::TrustedImm32(-8), JSC::MacroAssembler::stackPointerRegister);
+ m_assembler.addPtrNoFlags(JSC::MacroAssembler::TrustedImm32(-stackUnitInBytes), JSC::MacroAssembler::stackPointerRegister);
}
+#endif
}
void unalignStackPostFunctionCall()
{
+#if CPU(X86_64)
if (m_hasFunctionCallPadding) {
- m_assembler.addPtrNoFlags(JSC::MacroAssembler::TrustedImm32(8), JSC::MacroAssembler::stackPointerRegister);
+ m_assembler.addPtrNoFlags(JSC::MacroAssembler::TrustedImm32(stackUnitInBytes), JSC::MacroAssembler::stackPointerRegister);
m_hasFunctionCallPadding = false;
}
+#endif
}
void merge(StackAllocator&& stackA, StackAllocator&& stackB)
@@ -159,6 +172,14 @@
}
private:
+#if CPU(ARM64)
+ static const unsigned stackUnitInBytes = 16;
+#elif CPU(X86_64)
+ static const unsigned stackUnitInBytes = 8;
+#else
+#error Stack Unit Size is undefined.
+#endif
+
void reset()
{
m_offsetFromTop = 0;
