Diff
Modified: trunk/Source/_javascript_Core/ChangeLog (176071 => 176072)
--- trunk/Source/_javascript_Core/ChangeLog 2014-11-13 12:50:05 UTC (rev 176071)
+++ trunk/Source/_javascript_Core/ChangeLog 2014-11-13 16:43:05 UTC (rev 176072)
@@ -1,3 +1,18 @@
+2014-11-12 Mark Lam <[email protected]>
+
+ Create canonical lists of registers used by both the Assemblers and the JIT probes.
+ <https://webkit.org/b/138681>
+
+ Reviewed by Filip Pizlo.
+
+ * assembler/ARMAssembler.h:
+ * assembler/ARMv7Assembler.h:
+ * assembler/X86Assembler.h:
+ - The FP register storage type is still defined as __m128 because the JIT
+ probe code still expects that amount of storage to be available. Will
+ change this to double when the JIT probe code is updated accordingly in a
+ later patch.
+
2014-11-12 Andreas Kling <[email protected]>
Generate get_by_id for bracket access with constant string subscript.
Modified: trunk/Source/_javascript_Core/assembler/ARMAssembler.h (176071 => 176072)
--- trunk/Source/_javascript_Core/assembler/ARMAssembler.h 2014-11-13 12:50:05 UTC (rev 176071)
+++ trunk/Source/_javascript_Core/assembler/ARMAssembler.h 2014-11-13 16:43:05 UTC (rev 176072)
@@ -36,62 +36,6 @@
typedef uint32_t ARMWord;
- namespace ARMRegisters {
- typedef enum {
- r0 = 0,
- r1,
- r2,
- r3,
- r4,
- r5,
- r6, S0 = r6,
- r7,
- r8,
- r9,
- r10,
- r11, fp = r11, // frame pointer
- r12, ip = r12, S1 = r12,
- r13, sp = r13,
- r14, lr = r14,
- r15, pc = r15
- } RegisterID;
-
- typedef enum {
- d0,
- d1,
- d2,
- d3,
- d4,
- d5,
- d6,
- d7, SD0 = d7, /* Same as thumb assembler. */
- d8,
- d9,
- d10,
- d11,
- d12,
- d13,
- d14,
- d15,
- d16,
- d17,
- d18,
- d19,
- d20,
- d21,
- d22,
- d23,
- d24,
- d25,
- d26,
- d27,
- d28,
- d29,
- d30,
- d31
- } FPRegisterID;
-
-#if ENABLE(MASM_PROBE)
#define FOR_EACH_CPU_REGISTER(V) \
FOR_EACH_CPU_GPREGISTER(V) \
FOR_EACH_CPU_SPECIAL_REGISTER(V) \
@@ -109,11 +53,11 @@
V(void*, r8) \
V(void*, r9) \
V(void*, r10) \
- V(void*, r11) \
+ V(void*, fp) \
V(void*, ip) \
V(void*, sp) \
V(void*, lr) \
- V(void*, pc)
+ V(void*, pc) \
#define FOR_EACH_CPU_SPECIAL_REGISTER(V) \
V(void*, apsr) \
@@ -135,8 +79,49 @@
V(double, d12) \
V(double, d13) \
V(double, d14) \
- V(double, d15)
-#endif // ENABLE(MASM_PROBE)
+ V(double, d15) \
+ V(double, d16) \
+ V(double, d17) \
+ V(double, d18) \
+ V(double, d19) \
+ V(double, d20) \
+ V(double, d21) \
+ V(double, d22) \
+ V(double, d23) \
+ V(double, d24) \
+ V(double, d25) \
+ V(double, d26) \
+ V(double, d27) \
+ V(double, d28) \
+ V(double, d29) \
+ V(double, d30) \
+ V(double, d31) \
+
+ namespace ARMRegisters {
+
+ typedef enum {
+ #define DECLARE_REGISTER(_type, _regName) _regName,
+ FOR_EACH_CPU_GPREGISTER(DECLARE_REGISTER)
+ #undef DECLARE_REGISTER
+
+ // Pseudonyms for some of the registers.
+ S0 = r6,
+ r11 = fp, // frame pointer
+ r12 = ip, S1 = ip,
+ r13 = sp,
+ r14 = lr,
+ r15 = pc
+ } RegisterID;
+
+ typedef enum {
+ #define DECLARE_REGISTER(_type, _regName) _regName,
+ FOR_EACH_CPU_FPREGISTER(DECLARE_REGISTER)
+ #undef DECLARE_REGISTER
+
+ // Pseudonyms for some of the registers.
+ SD0 = d7, /* Same as thumb assembler. */
+ } FPRegisterID;
+
} // namespace ARMRegisters
class ARMAssembler {
Modified: trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h (176071 => 176072)
--- trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h 2014-11-13 12:50:05 UTC (rev 176071)
+++ trunk/Source/_javascript_Core/assembler/ARMv7Assembler.h 2014-11-13 16:43:05 UTC (rev 176072)
@@ -38,23 +38,83 @@
namespace JSC {
namespace ARMRegisters {
+
+ #define FOR_EACH_CPU_REGISTER(V) \
+ FOR_EACH_CPU_GPREGISTER(V) \
+ FOR_EACH_CPU_SPECIAL_REGISTER(V) \
+ FOR_EACH_CPU_FPREGISTER(V)
+
+ // The following are defined as pairs of the following value:
+ // 1. type of the storage needed to save the register value by the JIT probe.
+ // 2. name of the register.
+ #define FOR_EACH_CPU_GPREGISTER(V) \
+ V(void*, r0) \
+ V(void*, r1) \
+ V(void*, r2) \
+ V(void*, r3) \
+ V(void*, r4) \
+ V(void*, r5) \
+ V(void*, r6) \
+ V(void*, r7) \
+ V(void*, r8) \
+ V(void*, r9) \
+ V(void*, r10) \
+ V(void*, r11) \
+ V(void*, ip) \
+ V(void*, sp) \
+ V(void*, lr) \
+ V(void*, pc)
+
+ #define FOR_EACH_CPU_SPECIAL_REGISTER(V) \
+ V(void*, apsr) \
+ V(void*, fpscr) \
+
+ #define FOR_EACH_CPU_FPREGISTER(V) \
+ V(double, d0) \
+ V(double, d1) \
+ V(double, d2) \
+ V(double, d3) \
+ V(double, d4) \
+ V(double, d5) \
+ V(double, d6) \
+ V(double, d7) \
+ V(double, d8) \
+ V(double, d9) \
+ V(double, d10) \
+ V(double, d11) \
+ V(double, d12) \
+ V(double, d13) \
+ V(double, d14) \
+ V(double, d15) \
+ V(double, d16) \
+ V(double, d17) \
+ V(double, d18) \
+ V(double, d19) \
+ V(double, d20) \
+ V(double, d21) \
+ V(double, d22) \
+ V(double, d23) \
+ V(double, d24) \
+ V(double, d25) \
+ V(double, d26) \
+ V(double, d27) \
+ V(double, d28) \
+ V(double, d29) \
+ V(double, d30) \
+ V(double, d31)
+
typedef enum {
- r0,
- r1,
- r2,
- r3,
- r4,
- r5,
- r6,
- r7, fp = r7, // frame pointer
- r8,
- r9, sb = r9, // static base
- r10, sl = r10, // stack limit
- r11,
- r12, ip = r12,
- r13, sp = r13,
- r14, lr = r14,
- r15, pc = r15,
+ #define DECLARE_REGISTER(_type, _regName) _regName,
+ FOR_EACH_CPU_GPREGISTER(DECLARE_REGISTER)
+ #undef DECLARE_REGISTER
+
+ fp = r7, // frame pointer
+ sb = r9, // static base
+ sl = r10, // stack limit
+ r12 = ip,
+ r13 = sp,
+ r14 = lr,
+ r15 = pc
} RegisterID;
typedef enum {
@@ -93,38 +153,9 @@
} FPSingleRegisterID;
typedef enum {
- d0,
- d1,
- d2,
- d3,
- d4,
- d5,
- d6,
- d7,
- d8,
- d9,
- d10,
- d11,
- d12,
- d13,
- d14,
- d15,
- d16,
- d17,
- d18,
- d19,
- d20,
- d21,
- d22,
- d23,
- d24,
- d25,
- d26,
- d27,
- d28,
- d29,
- d30,
- d31,
+ #define DECLARE_REGISTER(_type, _regName) _regName,
+ FOR_EACH_CPU_FPREGISTER(DECLARE_REGISTER)
+ #undef DECLARE_REGISTER
} FPDoubleRegisterID;
typedef enum {
@@ -174,78 +205,8 @@
return (FPDoubleRegisterID)(reg >> 1);
}
-#if ENABLE(MASM_PROBE)
- #define FOR_EACH_CPU_REGISTER(V) \
- FOR_EACH_CPU_GPREGISTER(V) \
- FOR_EACH_CPU_SPECIAL_REGISTER(V) \
- FOR_EACH_CPU_FPREGISTER(V)
+} // namespace ARMRegister
- #define FOR_EACH_CPU_GPREGISTER(V) \
- V(void*, r0) \
- V(void*, r1) \
- V(void*, r2) \
- V(void*, r3) \
- V(void*, r4) \
- V(void*, r5) \
- V(void*, r6) \
- V(void*, r7) \
- V(void*, r8) \
- V(void*, r9) \
- V(void*, r10) \
- V(void*, r11) \
- V(void*, ip) \
- V(void*, sp) \
- V(void*, lr) \
- V(void*, pc)
-
- #define FOR_EACH_CPU_SPECIAL_REGISTER(V) \
- V(void*, apsr) \
- V(void*, fpscr) \
-
- #define FOR_EACH_CPU_FPREGISTER(V) \
- V(double, d0) \
- V(double, d1) \
- V(double, d2) \
- V(double, d3) \
- V(double, d4) \
- V(double, d5) \
- V(double, d6) \
- V(double, d7) \
- V(double, d8) \
- V(double, d9) \
- V(double, d10) \
- V(double, d11) \
- V(double, d12) \
- V(double, d13) \
- V(double, d14) \
- V(double, d15) \
- FOR_EACH_CPU_FPREGISTER_EXTENSION(V)
-
-#if CPU(APPLE_ARMV7S)
- #define FOR_EACH_CPU_FPREGISTER_EXTENSION(V) \
- V(double, d16) \
- V(double, d17) \
- V(double, d18) \
- V(double, d19) \
- V(double, d20) \
- V(double, d21) \
- V(double, d22) \
- V(double, d23) \
- V(double, d24) \
- V(double, d25) \
- V(double, d26) \
- V(double, d27) \
- V(double, d28) \
- V(double, d29) \
- V(double, d30) \
- V(double, d31)
-#else
- #define FOR_EACH_CPU_FPREGISTER_EXTENSION(V) // Nothing to add.
-#endif // CPU(APPLE_ARMV7S)
-
-#endif // ENABLE(MASM_PROBE)
-}
-
class ARMv7Assembler;
class ARMThumbImmediate {
friend class ARMv7Assembler;
Modified: trunk/Source/_javascript_Core/assembler/X86Assembler.h (176071 => 176072)
--- trunk/Source/_javascript_Core/assembler/X86Assembler.h 2014-11-13 12:50:05 UTC (rev 176071)
+++ trunk/Source/_javascript_Core/assembler/X86Assembler.h 2014-11-13 16:43:05 UTC (rev 176072)
@@ -44,97 +44,88 @@
inline bool CAN_SIGN_EXTEND_8_32(int32_t value) { return value == (int32_t)(signed char)value; }
namespace X86Registers {
- typedef enum {
- eax,
- ecx,
- edx,
- ebx,
- esp,
- ebp,
- esi,
- edi,
-#if CPU(X86_64)
- r8,
- r9,
- r10,
- r11,
- r12,
- r13,
- r14,
- r15,
-#endif
- } RegisterID;
+#define FOR_EACH_CPU_REGISTER(V) \
+ FOR_EACH_CPU_GPREGISTER(V) \
+ FOR_EACH_CPU_SPECIAL_REGISTER(V) \
+ FOR_EACH_CPU_FPREGISTER(V)
- typedef enum {
- xmm0,
- xmm1,
- xmm2,
- xmm3,
- xmm4,
- xmm5,
- xmm6,
- xmm7,
+// The following are defined as pairs of the following value:
+// 1. type of the storage needed to save the register value by the JIT probe.
+// 2. name of the register.
+#define FOR_EACH_CPU_GPREGISTER(V) \
+ V(void*, eax) \
+ V(void*, ecx) \
+ V(void*, edx) \
+ V(void*, ebx) \
+ V(void*, esp) \
+ V(void*, ebp) \
+ V(void*, esi) \
+ V(void*, edi) \
+ FOR_EACH_X86_64_CPU_GPREGISTER(V)
-#if CPU(X86_64)
- xmm8,
- xmm9,
- xmm10,
- xmm11,
- xmm12,
- xmm13,
- xmm14,
- xmm15,
-#endif
- } XMMRegisterID;
+#define FOR_EACH_CPU_SPECIAL_REGISTER(V) \
+ V(void*, eip) \
+ V(void*, eflags) \
-#if ENABLE(MASM_PROBE)
- #define FOR_EACH_CPU_REGISTER(V) \
- FOR_EACH_CPU_GPREGISTER(V) \
- FOR_EACH_CPU_SPECIAL_REGISTER(V) \
- FOR_EACH_CPU_FPREGISTER(V)
+// Note: the JITs only stores double values in the FP registers. However, the
+// storage type here is defined as __m128 because the JIT probe code which does
+// the storing still expects a __m128 slot. This will be changed when the JIT
+// probe code is updated later to reflect the JITs' usage of these registers.
+#define FOR_EACH_CPU_FPREGISTER(V) \
+ V(__m128, xmm0) \
+ V(__m128, xmm1) \
+ V(__m128, xmm2) \
+ V(__m128, xmm3) \
+ V(__m128, xmm4) \
+ V(__m128, xmm5) \
+ V(__m128, xmm6) \
+ V(__m128, xmm7) \
+ FOR_EACH_X86_64_CPU_FPREGISTER(V)
- #define FOR_EACH_CPU_GPREGISTER(V) \
- V(void*, eax) \
- V(void*, ebx) \
- V(void*, ecx) \
- V(void*, edx) \
- V(void*, esi) \
- V(void*, edi) \
- V(void*, ebp) \
- V(void*, esp) \
- FOR_EACH_X86_64_CPU_GPREGISTER(V)
+#if CPU(X86)
- #define FOR_EACH_CPU_SPECIAL_REGISTER(V) \
- V(void*, eip) \
- V(void*, eflags) \
+#define FOR_EACH_X86_64_CPU_GPREGISTER(V) // Nothing to add.
+#define FOR_EACH_X86_64_CPU_FPREGISTER(V) // Nothing to add.
- #define FOR_EACH_CPU_FPREGISTER(V) \
- V(__m128, xmm0) \
- V(__m128, xmm1) \
- V(__m128, xmm2) \
- V(__m128, xmm3) \
- V(__m128, xmm4) \
- V(__m128, xmm5) \
- V(__m128, xmm6) \
- V(__m128, xmm7)
-
-#if CPU(X86)
- #define FOR_EACH_X86_64_CPU_GPREGISTER(V) // Nothing to add.
#elif CPU(X86_64)
- #define FOR_EACH_X86_64_CPU_GPREGISTER(V) \
- V(void*, r8) \
- V(void*, r9) \
- V(void*, r10) \
- V(void*, r11) \
- V(void*, r12) \
- V(void*, r13) \
- V(void*, r14) \
- V(void*, r15)
+
+#define FOR_EACH_X86_64_CPU_GPREGISTER(V) \
+ V(void*, r8) \
+ V(void*, r9) \
+ V(void*, r10) \
+ V(void*, r11) \
+ V(void*, r12) \
+ V(void*, r13) \
+ V(void*, r14) \
+ V(void*, r15)
+
+#define FOR_EACH_X86_64_CPU_FPREGISTER(V) \
+ V(__m128, xmm8) \
+ V(__m128, xmm9) \
+ V(__m128, xmm10) \
+ V(__m128, xmm11) \
+ V(__m128, xmm12) \
+ V(__m128, xmm13) \
+ V(__m128, xmm14) \
+ V(__m128, xmm15)
+
#endif // CPU(X86_64)
-#endif // ENABLE(MASM_PROBE)
-}
+typedef enum {
+ #define DECLARE_REGISTER(_type, _regName) _regName,
+ FOR_EACH_CPU_GPREGISTER(DECLARE_REGISTER)
+ #undef DECLARE_REGISTER
+} RegisterID;
+
+typedef enum {
+ #define DECLARE_REGISTER(_type, _regName) _regName,
+ FOR_EACH_CPU_FPREGISTER(DECLARE_REGISTER)
+ #undef DECLARE_REGISTER
+} XMMRegisterID;
+
+} // namespace X86Register
+
class X86Assembler {
public:
typedef X86Registers::RegisterID RegisterID;
