Title: [176890] trunk/Source/_javascript_Core
- Revision
- 176890
- Author
- [email protected]
- Date
- 2014-12-05 16:29:18 -0800 (Fri, 05 Dec 2014)
Log Message
[JSC][FTL] Add the data layout to the module and fix the pass order.
https://bugs.webkit.org/show_bug.cgi?id=138748
Patch by Juergen Ributzka <[email protected]> on 2014-12-05
Reviewed by Oliver Hunt.
This adds the data layout to the module, so it can be used by all
optimization passes in the LLVM optimizer pipeline. This also allows
FastISel to select more instructions, because less non-legal types are
generated.
Also fix the order of the alias analysis passes in the optimization
pipeline.
* ftl/FTLCompile.cpp:
(JSC::FTL::mmAllocateDataSection):
Modified Paths
Diff
Modified: trunk/Source/_javascript_Core/ChangeLog (176889 => 176890)
--- trunk/Source/_javascript_Core/ChangeLog 2014-12-06 00:28:49 UTC (rev 176889)
+++ trunk/Source/_javascript_Core/ChangeLog 2014-12-06 00:29:18 UTC (rev 176890)
@@ -1,3 +1,21 @@
+2014-12-05 Juergen Ributzka <[email protected]>
+
+ [JSC][FTL] Add the data layout to the module and fix the pass order.
+ https://bugs.webkit.org/show_bug.cgi?id=138748
+
+ Reviewed by Oliver Hunt.
+
+ This adds the data layout to the module, so it can be used by all
+ optimization passes in the LLVM optimizer pipeline. This also allows
+ FastISel to select more instructions, because less non-legal types are
+ generated.
+
+ Also fix the order of the alias analysis passes in the optimization
+ pipeline.
+
+ * ftl/FTLCompile.cpp:
+ (JSC::FTL::mmAllocateDataSection):
+
2014-12-05 Geoffrey Garen <[email protected]>
Removed an unused function.
Modified: trunk/Source/_javascript_Core/ftl/FTLCompile.cpp (176889 => 176890)
--- trunk/Source/_javascript_Core/ftl/FTLCompile.cpp 2014-12-06 00:28:49 UTC (rev 176889)
+++ trunk/Source/_javascript_Core/ftl/FTLCompile.cpp 2014-12-06 00:29:18 UTC (rev 176890)
@@ -633,33 +633,35 @@
CRASH();
}
+ // The data layout also has to be set in the module. Get the data layout from the MCJIT and apply
+ // it to the module.
+ LLVMTargetMachineRef targetMachine = llvm->GetExecutionEngineTargetMachine(engine);
+ LLVMTargetDataRef targetData = llvm->GetExecutionEngineTargetData(engine);
+ llvm->SetDataLayout(state.module, llvm->CopyStringRepOfTargetData(targetData));
+
LLVMPassManagerRef functionPasses = 0;
LLVMPassManagerRef modulePasses;
-
+
if (Options::llvmSimpleOpt()) {
modulePasses = llvm->CreatePassManager();
- llvm->AddTargetData(llvm->GetExecutionEngineTargetData(engine), modulePasses);
-
- LLVMTargetMachineRef targetMachine = llvm->GetExecutionEngineTargetMachine(engine);
-
+ llvm->AddTargetData(targetData, modulePasses);
llvm->AddAnalysisPasses(targetMachine, modulePasses);
llvm->AddPromoteMemoryToRegisterPass(modulePasses);
-
llvm->AddGlobalOptimizerPass(modulePasses);
-
llvm->AddFunctionInliningPass(modulePasses);
llvm->AddPruneEHPass(modulePasses);
llvm->AddGlobalDCEPass(modulePasses);
-
llvm->AddConstantPropagationPass(modulePasses);
llvm->AddAggressiveDCEPass(modulePasses);
llvm->AddInstructionCombiningPass(modulePasses);
+ // BEGIN - DO NOT CHANGE THE ORDER OF THE ALIAS ANALYSIS PASSES
+ llvm->AddTypeBasedAliasAnalysisPass(modulePasses);
llvm->AddBasicAliasAnalysisPass(modulePasses);
- llvm->AddTypeBasedAliasAnalysisPass(modulePasses);
+ // END - DO NOT CHANGE THE ORDER OF THE ALIAS ANALYSIS PASSES
llvm->AddGVNPass(modulePasses);
llvm->AddCFGSimplificationPass(modulePasses);
llvm->AddDeadStoreEliminationPass(modulePasses);
-
+
llvm->RunPassManager(modulePasses, state.module);
} else {
LLVMPassManagerBuilderRef passBuilder = llvm->PassManagerBuilderCreate();
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