[webkit-changes] [188149] branches/jsc-tailcall/Source/JavaScriptCore

Fri, 07 Aug 2015 13:07:02 -0700

Title: [188149] branches/jsc-tailcall/Source/_javascript_Core
Revision
188149
Author
[email protected]
Date
2015-08-07 13:06:24 -0700 (Fri, 07 Aug 2015)

Log Message

Unreviewed. Rollout r188072 as there are crashes with release builds.

The combination of r188071 and r188072 does not properly restore all registers for
all exceptions.  Rolling out to make the branch functional again.

* llint/LowLevelInterpreter.asm:
* llint/LowLevelInterpreter64.asm:

Modified Paths

Diff

Modified: branches/jsc-tailcall/Source/_javascript_Core/ChangeLog (188148 => 188149)


--- branches/jsc-tailcall/Source/_javascript_Core/ChangeLog	2015-08-07 19:40:45 UTC (rev 188148)
+++ branches/jsc-tailcall/Source/_javascript_Core/ChangeLog	2015-08-07 20:06:24 UTC (rev 188149)
@@ -1,3 +1,13 @@
+2015-08-07  Michael Saboff  <[email protected]>
+
+        Unreviewed. Rollout r188072 as there are crashes with release builds.
+
+        The combination of r188071 and r188072 does not properly restore all registers for
+        all exceptions.  Rolling out to make the branch functional again.
+
+        * llint/LowLevelInterpreter.asm:
+        * llint/LowLevelInterpreter64.asm:
+
 2015-08-06  Michael Saboff  <[email protected]>
 
         jsc-tailcall: Stop saving and restoring all callee saves on vmEntry / exit for platforms with per function callee saves handling

Modified: branches/jsc-tailcall/Source/_javascript_Core/llint/LowLevelInterpreter.asm (188148 => 188149)


--- branches/jsc-tailcall/Source/_javascript_Core/llint/LowLevelInterpreter.asm	2015-08-07 19:40:45 UTC (rev 188148)
+++ branches/jsc-tailcall/Source/_javascript_Core/llint/LowLevelInterpreter.asm	2015-08-07 20:06:24 UTC (rev 188149)
@@ -397,15 +397,18 @@
     end
 end
 
-# ARM64 and the X86 64 bit platforms properly save and restore callee saves in each function.
-if C_LOOP or ARM64 or X86_64 or X86_64_WIN
+if C_LOOP
     const CalleeSaveRegisterCount = 0
 elsif ARM or ARMv7_TRADITIONAL or ARMv7
     const CalleeSaveRegisterCount = 7
-elsif SH4 or MIPS
+elsif ARM64
+    const CalleeSaveRegisterCount = 10
+elsif SH4 or X86_64 or MIPS
     const CalleeSaveRegisterCount = 5
 elsif X86 or X86_WIN
     const CalleeSaveRegisterCount = 3
+elsif X86_64_WIN
+    const CalleeSaveRegisterCount = 7
 end
 
 const CalleeRegisterSaveSize = CalleeSaveRegisterCount * PtrSize
@@ -415,11 +418,17 @@
 const VMEntryTotalFrameSize = (CalleeRegisterSaveSize + sizeof VMEntryRecord + StackAlignment - 1) & ~StackAlignmentMask
 
 macro pushCalleeSaves()
-    if C_LOOP or ARM64 or X86_64 or X86_64_WIN
+    if C_LOOP
     elsif ARM or ARMv7_TRADITIONAL
         emit "push {r4-r10}"
     elsif ARMv7
         emit "push {r4-r6, r8-r11}"
+    elsif ARM64
+        emit "stp x20, x19, [sp, #-16]!"
+        emit "stp x22, x21, [sp, #-16]!"
+        emit "stp x24, x23, [sp, #-16]!"
+        emit "stp x26, x25, [sp, #-16]!"
+        emit "stp x28, x27, [sp, #-16]!"
     elsif MIPS
         emit "addiu $sp, $sp, -20"
         emit "sw $20, 16($sp)"
@@ -441,15 +450,35 @@
         emit "push esi"
         emit "push edi"
         emit "push ebx"
+    elsif X86_64
+        emit "push %r12"
+        emit "push %r13"
+        emit "push %r14"
+        emit "push %r15"
+        emit "push %rbx"
+    elsif X86_64_WIN
+        emit "push r12"
+        emit "push r13"
+        emit "push r14"
+        emit "push r15"
+        emit "push rbx"
+        emit "push rdi"
+        emit "push rsi"
     end
 end
 
 macro popCalleeSaves()
-    if C_LOOP or ARM64 or X86_64 or X86_64_WIN
+    if C_LOOP
     elsif ARM or ARMv7_TRADITIONAL
         emit "pop {r4-r10}"
     elsif ARMv7
         emit "pop {r4-r6, r8-r11}"
+    elsif ARM64
+        emit "ldp x28, x27, [sp], #16"
+        emit "ldp x26, x25, [sp], #16"
+        emit "ldp x24, x23, [sp], #16"
+        emit "ldp x22, x21, [sp], #16"
+        emit "ldp x20, x19, [sp], #16"
     elsif MIPS
         emit "lw $16, 0($sp)"
         emit "lw $17, 4($sp)"
@@ -471,6 +500,20 @@
         emit "pop ebx"
         emit "pop edi"
         emit "pop esi"
+    elsif X86_64
+        emit "pop %rbx"
+        emit "pop %r15"
+        emit "pop %r14"
+        emit "pop %r13"
+        emit "pop %r12"
+    elsif X86_64_WIN
+        emit "pop rsi"
+        emit "pop rdi"
+        emit "pop rbx"
+        emit "pop r15"
+        emit "pop r14"
+        emit "pop r13"
+        emit "pop r12"
     end
 end
 
@@ -516,9 +559,10 @@
         storep csr3, -16[cfr]
         storep csr0, -24[cfr]
     elsif X86_64_WIN
-        storep csr6, -8[cfr]
-        storep csr5, -16[cfr]
-        storep csr0, -24[cfr]
+        storep t4, -8[cfr]
+        storep csr6, -16[cfr]
+        storep csr5, -24[cfr]
+        storep csr0, -32[cfr]
     end
 end

Modified: branches/jsc-tailcall/Source/_javascript_Core/llint/LowLevelInterpreter64.asm (188148 => 188149)


--- branches/jsc-tailcall/Source/_javascript_Core/llint/LowLevelInterpreter64.asm	2015-08-07 19:40:45 UTC (rev 188148)
+++ branches/jsc-tailcall/Source/_javascript_Core/llint/LowLevelInterpreter64.asm	2015-08-07 20:06:24 UTC (rev 188149)
@@ -215,6 +215,9 @@
     end
     storep cfr, VM::topVMEntryFrame[vm]
 
+    move TagTypeNumber, tagTypeNumber
+    addp TagBitTypeOther, tagTypeNumber, tagMask
+
     checkStackPointerAlignment(extraTempReg, 0xbad0dc02)
 
     makeCall(entry, t3)

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