Title: [194011] trunk/Source/_javascript_Core
Revision
194011
Author
[email protected]
Date
2015-12-12 15:04:54 -0800 (Sat, 12 Dec 2015)

Log Message

[JSC] Add lowering for B3's Store8 opcode
https://bugs.webkit.org/show_bug.cgi?id=152208

Reviewed by Geoffrey Garen.

B3 has an opcode to store 8bit values but it had
no lowering.

* b3/B3LowerToAir.cpp:
(JSC::B3::Air::LowerToAir::createStore):
(JSC::B3::Air::LowerToAir::lower):
* b3/air/AirOpcode.opcodes:
* b3/testb3.cpp:
(JSC::B3::testStore8Arg):
(JSC::B3::testStore8Imm):
(JSC::B3::testStorePartial8BitRegisterOnX86):
(JSC::B3::run):

Modified Paths

Diff

Modified: trunk/Source/_javascript_Core/ChangeLog (194010 => 194011)


--- trunk/Source/_javascript_Core/ChangeLog	2015-12-12 22:03:09 UTC (rev 194010)
+++ trunk/Source/_javascript_Core/ChangeLog	2015-12-12 23:04:54 UTC (rev 194011)
@@ -1,3 +1,23 @@
+2015-12-12  Benjamin Poulain  <[email protected]>
+
+        [JSC] Add lowering for B3's Store8 opcode
+        https://bugs.webkit.org/show_bug.cgi?id=152208
+
+        Reviewed by Geoffrey Garen.
+
+        B3 has an opcode to store 8bit values but it had
+        no lowering.
+
+        * b3/B3LowerToAir.cpp:
+        (JSC::B3::Air::LowerToAir::createStore):
+        (JSC::B3::Air::LowerToAir::lower):
+        * b3/air/AirOpcode.opcodes:
+        * b3/testb3.cpp:
+        (JSC::B3::testStore8Arg):
+        (JSC::B3::testStore8Imm):
+        (JSC::B3::testStorePartial8BitRegisterOnX86):
+        (JSC::B3::run):
+
 2015-12-12  Csaba Osztrogonác  <[email protected]>
 
         [ARM] Add the missing setupArgumentsWithExecState functions after r193974

Modified: trunk/Source/_javascript_Core/b3/B3LowerToAir.cpp (194010 => 194011)


--- trunk/Source/_javascript_Core/b3/B3LowerToAir.cpp	2015-12-12 22:03:09 UTC (rev 194010)
+++ trunk/Source/_javascript_Core/b3/B3LowerToAir.cpp	2015-12-12 23:04:54 UTC (rev 194011)
@@ -746,16 +746,20 @@
         return true;
     }
 
-    Inst createStore(Value* value, const Arg& dest)
+    Inst createStore(Air::Opcode move, Value* value, const Arg& dest)
     {
-        Air::Opcode move = moveForType(value->type());
-
         if (imm(value) && isValidForm(move, Arg::Imm, dest.kind()))
             return Inst(move, m_value, imm(value), dest);
 
         return Inst(move, m_value, tmp(value), dest);
     }
 
+    Inst createStore(Value* value, const Arg& dest)
+    {
+        Air::Opcode moveOpcode = moveForType(value->type());
+        return createStore(moveOpcode, value, dest);
+    }
+
     void appendStore(Value* value, const Arg& dest)
     {
         m_insts.last().append(createStore(value, dest));
@@ -1557,6 +1561,12 @@
             return;
         }
 
+        case B3::Store8: {
+            Value* valueToStore = m_value->child(0);
+            m_insts.last().append(createStore(Air::Store8, valueToStore, addr(m_value)));
+            return;
+        }
+
         case Trunc: {
             ASSERT(tmp(m_value->child(0)) == tmp(m_value));
             return;

Modified: trunk/Source/_javascript_Core/b3/air/AirOpcode.opcodes (194010 => 194011)


--- trunk/Source/_javascript_Core/b3/air/AirOpcode.opcodes	2015-12-12 22:03:09 UTC (rev 194010)
+++ trunk/Source/_javascript_Core/b3/air/AirOpcode.opcodes	2015-12-12 23:04:54 UTC (rev 194011)
@@ -325,6 +325,12 @@
     Addr, Tmp
     Index, Tmp
 
+Store8 U:G, D:G
+    Tmp, Index
+    Tmp, Addr
+    Imm, Index
+    Imm, Addr
+
 Load8SignedExtendTo32 U:G, D:G
     Addr, Tmp
     Index, Tmp

Modified: trunk/Source/_javascript_Core/b3/testb3.cpp (194010 => 194011)


--- trunk/Source/_javascript_Core/b3/testb3.cpp	2015-12-12 22:03:09 UTC (rev 194010)
+++ trunk/Source/_javascript_Core/b3/testb3.cpp	2015-12-12 23:04:54 UTC (rev 194011)
@@ -3704,6 +3704,135 @@
     CHECK(slot == value);
 }
 
+void testStore8Arg()
+{
+    { // Direct addressing.
+        Procedure proc;
+        BasicBlock* root = proc.addBlock();
+
+        Value* value = root->appendNew<Value>(proc, Trunc, Origin(),
+            root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0));
+        Value* address = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR1);
+
+        root->appendNew<MemoryValue>(proc, Store8, Origin(), value, address);
+        root->appendNew<ControlValue>(proc, Return, Origin(), value);
+
+        int8_t storage = 0;
+        CHECK(compileAndRun<int64_t>(proc, 42, &storage) == 42);
+        CHECK(storage == 42);
+    }
+
+    { // Indexed addressing.
+        Procedure proc;
+        BasicBlock* root = proc.addBlock();
+
+        Value* value = root->appendNew<Value>(proc, Trunc, Origin(),
+            root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0));
+        Value* base = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR1);
+        Value* offset = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR2);
+        Value* displacement = root->appendNew<Const64Value>(proc, Origin(), -1);
+
+        Value* baseDisplacement = root->appendNew<Value>(proc, Add, Origin(), displacement, base);
+        Value* address = root->appendNew<Value>(proc, Add, Origin(), baseDisplacement, offset);
+
+        root->appendNew<MemoryValue>(proc, Store8, Origin(), value, address);
+        root->appendNew<ControlValue>(proc, Return, Origin(), value);
+
+        int8_t storage = 0;
+        CHECK(compileAndRun<int64_t>(proc, 42, &storage, 1) == 42);
+        CHECK(storage == 42);
+    }
+}
+
+void testStore8Imm()
+{
+    { // Direct addressing.
+        Procedure proc;
+        BasicBlock* root = proc.addBlock();
+
+        Value* value = root->appendNew<Const32Value>(proc, Origin(), 42);
+        Value* address = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0);
+
+        root->appendNew<MemoryValue>(proc, Store8, Origin(), value, address);
+        root->appendNew<ControlValue>(proc, Return, Origin(), value);
+
+        int8_t storage = 0;
+        CHECK(compileAndRun<int64_t>(proc, &storage) == 42);
+        CHECK(storage == 42);
+    }
+
+    { // Indexed addressing.
+        Procedure proc;
+        BasicBlock* root = proc.addBlock();
+
+        Value* value = root->appendNew<Const32Value>(proc, Origin(), 42);
+        Value* base = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0);
+        Value* offset = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR1);
+        Value* displacement = root->appendNew<Const64Value>(proc, Origin(), -1);
+
+        Value* baseDisplacement = root->appendNew<Value>(proc, Add, Origin(), displacement, base);
+        Value* address = root->appendNew<Value>(proc, Add, Origin(), baseDisplacement, offset);
+
+        root->appendNew<MemoryValue>(proc, Store8, Origin(), value, address);
+        root->appendNew<ControlValue>(proc, Return, Origin(), value);
+
+        int8_t storage = 0;
+        CHECK(compileAndRun<int64_t>(proc, &storage, 1) == 42);
+        CHECK(storage == 42);
+    }
+}
+
+void testStorePartial8BitRegisterOnX86()
+{
+    Procedure proc;
+    BasicBlock* root = proc.addBlock();
+
+    // We want to have this in ECX.
+    Value* returnValue = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0);
+
+    // We want this suck in EDX.
+    Value* whereToStore = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR1);
+
+    // The patch point is there to help us force the hand of the compiler.
+    PatchpointValue* patchpoint = root->appendNew<PatchpointValue>(proc, Int32, Origin());
+
+    // For the value above to be materialized and give the allocator
+    // a stronger insentive to name those register the way we need.
+    patchpoint->append(ConstrainedValue(returnValue, ValueRep(GPRInfo::regT3)));
+    patchpoint->append(ConstrainedValue(whereToStore, ValueRep(GPRInfo::regT2)));
+
+    // We'll produce EDI.
+    patchpoint->resultConstraint = ValueRep::reg(GPRInfo::regT6);
+
+    // Give the allocator a good reason not to use any other register.
+    RegisterSet clobberSet = RegisterSet::allGPRs();
+    clobberSet.exclude(RegisterSet::stackRegisters());
+    clobberSet.exclude(RegisterSet::reservedHardwareRegisters());
+    clobberSet.clear(GPRInfo::regT3);
+    clobberSet.clear(GPRInfo::regT2);
+    clobberSet.clear(GPRInfo::regT6);
+    patchpoint->clobberLate(clobberSet);
+
+    // Set EDI.
+    patchpoint->setGenerator(
+        [&] (CCallHelpers& jit, const StackmapGenerationParams& params) {
+            AllowMacroScratchRegisterUsage allowScratch(jit);
+            jit.xor64(params[0].gpr(), params[0].gpr());
+        });
+
+    // If everything went well, we should have the big number in eax,
+    // patchpoint == EDI and whereToStore = EDX.
+    // Since EDI == 5, and AH = 5 on 8 bit store, this would go wrong
+    // if we use X86 partial registers.
+    root->appendNew<MemoryValue>(proc, Store8, Origin(), patchpoint, whereToStore);
+
+    root->appendNew<ControlValue>(proc, Return, Origin(), returnValue);
+
+    int8_t storage = 0xff;
+    CHECK(compileAndRun<int64_t>(proc, 0x12345678abcdef12, &storage) == 0x12345678abcdef12);
+    CHECK(!storage);
+}
+
 void testTrunc(int64_t value)
 {
     Procedure proc;
@@ -8139,6 +8268,9 @@
     RUN(testStore32(44));
     RUN(testStoreConstant(49));
     RUN(testStoreConstantPtr(49));
+    RUN(testStore8Arg());
+    RUN(testStore8Imm());
+    RUN(testStorePartial8BitRegisterOnX86());
     RUN(testTrunc((static_cast<int64_t>(1) << 40) + 42));
     RUN(testAdd1(45));
     RUN(testAdd1Ptr(51));
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