> On Jul 19, 2017, at 9:49 AM, Konstantin Tokarev <annu...@yandex.ru> wrote:
> 
> 
> 
> 19.07.2017, 02:49, "Mark Lam" <mark....@apple.com>:
>> FYI, I’m looking into making OSR exits work in a more memory efficient way 
>> using the JIT probe mechanism.  Once we make this transition, the DFG and 
>> FTL will not work for any CPU targets that don’t support the JIT probe 
>> mechanism.  The API to the JIT probe will probably change as well as this 
>> work progresses.  I’ll take care of updating all the probe implementations 
>> for ARM and x86 variants.
>> 
>> AFAICT, only CPU(MIPS) does not currently support the probe mechanism.  It’s 
>> up to the MIPS folks to implement that support if they want to continue to 
>> use the DFG.  Feel free to contact me if you have questions regarding the 
>> probe mechanism.
>> 
>> This work will be tracked in https://bugs.webkit.org/show_bug.cgi?id=174645.
> 
> Could you elaborate, what code needs to be implemented for MIPS?

See everything guarded by ENABLE(MASM_PROBE) in MacroAssemblerX86Common.cpp.  
You’ll need to have the equivalent for MIPS.  Eventually, we may need some 
additional changes as well, but that depends on the solution currently being 
investigated.

Mark

> 
>> 
>> Thanks.
>> 
>> Mark
>> 
>> ,
>> 
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> 
> 
> -- 
> Regards,
> Konstantin

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