Hi Jason,

we don't assume that volatile implies a memory
> barrier. We could probably switch to /volatile:iso.
>

Does it mean that hardware reordering like writes reordered after reads
on x86/amd64 and everything else on ARM are not considered to be a problem?

Should barriers generated by WaitForSingleObject / SetEvent be enough?

-- 
-Lev
_______________________________________________
WireGuard mailing list
[email protected]
https://lists.zx2c4.com/mailman/listinfo/wireguard

Reply via email to