Hi All,

I have a code sample that I want to try on our new cluster.  These are 
dual-socket nodes with dual-M2070 cards connected by QDR IB.

I configured my local environment and built the code as follows:
svn co https://x10.svn.sourceforge.net/svnroot/x10/tags/SF_RELEASE_2_2_2 
x10-2.2.2
cd x10-2.2.2/x10.dist
ant -DNO_CHECKS=true -Doptimize=true -DX10RT_MPI=true -DX10RT_CUDA=true diet

Things build.  

And, then I get an interactive PBS job on 2 nodes.  I would like the launch the 
program with 2 X10 places per node, with each X10 place having one child place 
for a GPU.  Does anyone have the incantation that would launch this 
configuration?

By the way, is there a hostname function in X10 I can call to verify which node 
I am running on?

So, first I tried...

dhudak@n0282 1021%> mpiexec -pernode ./CUDATopology
Dumping places at place: Place(0)
Place: Place(0)
  Parent: Place(0)
  NumChildren: 0
  Is a Host place

Dumping places at place: Place(0)
Place: Place(0)
  Parent: Place(0)
  NumChildren: 0
  Is a Host place

…and it ran two copies of the program, each on the two nodes.  (I verified by 
running top on the other node, and seeing a CUDATopology process running.)

If I add the X10RT_ACCELS variable, each copy finds the two cards:

dhudak@n0282 1012%> X10RT_ACCELS=ALL mpiexec -pernode ./CUDATopology
Dumping places at place: Place(0)
Place: Place(0)
  Parent: Place(0)
  NumChildren: 2
  Is a Host place
  Child 0: Place(1)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(2)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place

Dumping places at place: Place(0)
Place: Place(0)
  Parent: Place(0)
  NumChildren: 2
  Is a Host place
  Child 0: Place(1)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(2)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place

OK, so I wanted place 1 on one node and place 2 on another node:

dhudak@n0282 1029%> X10RT_ACCELS=ALL X10_NPLACES=2 mpiexec -pernode 
./CUDATopology
Dumping places at place: Place(0)
Place: Place(0)
  Parent: Place(0)
  NumChildren: 2
  Is a Host place
  Child 0: Place(2)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(3)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
Place: Place(1)
  Parent: Place(1)
  NumChildren: 2
  Is a Host place
  Child 0: Place(4)
    Parent: Place(1)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(5)
    Parent: Place(1)
    NumChildren: 0
    Is a CUDA place

Dumping places at place: Place(1)
Place: Place(0)
  Parent: Place(0)
  NumChildren: 2
  Is a Host place
  Child 0: Place(2)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(3)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
Place: Place(1)
  Parent: Place(1)
  NumChildren: 2
  Is a Host place
  Child 0: Place(4)
    Parent: Place(1)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(5)
    Parent: Place(1)
    NumChildren: 0
    Is a CUDA place

Dumping places at place: Place(0)
Place: Place(0)
  Parent: Place(0)
  NumChildren: 2
  Is a Host place
  Child 0: Place(2)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(3)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
Place: Place(1)
  Parent: Place(1)
  NumChildren: 2
  Is a Host place
  Child 0: Place(4)
    Parent: Place(1)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(5)
    Parent: Place(1)
    NumChildren: 0
    Is a CUDA place

Dumping places at place: Place(1)
Place: Place(0)
  Parent: Place(0)
  NumChildren: 2
  Is a Host place
  Child 0: Place(2)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(3)
    Parent: Place(0)
    NumChildren: 0
    Is a CUDA place
Place: Place(1)
  Parent: Place(1)
  NumChildren: 2
  Is a Host place
  Child 0: Place(4)
    Parent: Place(1)
    NumChildren: 0
    Is a CUDA place
  Child 1: Place(5)
    Parent: Place(1)
    NumChildren: 0
    Is a CUDA place

Does anyone have any advice?

Thanks,
Dave
---
David E. Hudak, Ph.D.          dhu...@osc.edu
Program Director, HPC Engineering
Ohio Supercomputer Center
http://www.osc.edu










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