---------- Forwarded message ---------- From: Steve Borho <[email protected]> Date: Thu, Oct 17, 2013 at 12:54 AM Subject: Re: [x265] [PATCH] fixed PIC issue with 64-bit build To: Development for x265 <[email protected]>
On Wed, Oct 16, 2013 at 1:23 AM, <[email protected]> wrote: > # HG changeset patch > # User Praveen Tiwari > # Date 1381904622 -19800 > # Node ID 0c17033defe6a1c8a0ea106c62171fc99a886f9c > # Parent 203a9b334293c50a3e8741352726f2eef71dddb3 > fixed PIC issue with 64-bit build > >>I'm assuming this patch was superceded by the other patches Yes, you don't need to merge it separately, my latest patch contains all the modifications together. > > diff -r 203a9b334293 -r 0c17033defe6 source/common/x86/asm-primitives.cpp > --- a/source/common/x86/asm-primitives.cpp Tue Oct 15 22:30:30 2013 > +0530 > +++ b/source/common/x86/asm-primitives.cpp Wed Oct 16 11:53:42 2013 > +0530 > @@ -280,7 +280,7 @@ > p.sa8d[BLOCK_8x8] = x265_pixel_sa8d_8x8_sse4; > p.sa8d[BLOCK_16x16] = x265_pixel_sa8d_16x16_sse4; > SA8D_INTER_FROM_BLOCK(sse4); > -#if !defined(X86_64) // will go away tommorow once PIC issue is fixed > for 64-bit build > + > p.chroma_hpp[CHROMA_PARTITION_W2] = > x265_interp_4tap_horiz_pp_w2_sse4; > p.chroma_hpp[CHROMA_PARTITION_W4] = > x265_interp_4tap_horiz_pp_w4_sse4; > p.chroma_hpp[CHROMA_PARTITION_W6] = > x265_interp_4tap_horiz_pp_w6_sse4; > @@ -288,7 +288,6 @@ > p.chroma_hpp[CHROMA_PARTITION_W12] = > x265_interp_4tap_horiz_pp_w12_sse4; > p.chroma_hpp[CHROMA_PARTITION_W16] = > x265_interp_4tap_horiz_pp_w16_sse4; > p.chroma_hpp[CHROMA_PARTITION_W32] = > x265_interp_4tap_horiz_pp_w32_sse4; > -#endif > } > if (cpuMask & X265_CPU_AVX) > { > diff -r 203a9b334293 -r 0c17033defe6 source/common/x86/ipfilter8.asm > --- a/source/common/x86/ipfilter8.asm Tue Oct 15 22:30:30 2013 +0530 > +++ b/source/common/x86/ipfilter8.asm Wed Oct 16 11:53:42 2013 +0530 > @@ -165,7 +165,7 @@ > > > ;----------------------------------------------------------------------------- > %macro IPFILTER_CHROMA 1 > INIT_XMM sse4 > -cglobal interp_4tap_horiz_pp_w%1, 6, 7, 6, src, srcstride, dst, > dststride, height, coeffIdx > +cglobal interp_4tap_horiz_pp_w%1, 5, 7, 6, src, srcstride, dst, > dststride, height > %define coef2 m5 > %define Tm0 m4 > %define Tm1 m3 > @@ -173,7 +173,14 @@ > %define x1 m1 > %define x0 m0 > > -movd coef2, [tab_coeff + r5d * 4] > +mov r5d, r5m > + > +%ifdef PIC > +lea r6, [tab_coeff] > +movd coef2, [r6 + r5 * 4] > +%else > +movd coef2, [tab_coeff + r5 * 4] > +%endif > > pshufd coef2, coef2, 0 > mova x2, [tab_c_512] > @@ -202,7 +209,7 @@ > > > ;----------------------------------------------------------------------------- > %macro IPFILTER_CHROMA_W 1 > INIT_XMM sse4 > -cglobal interp_4tap_horiz_pp_w%1, 6, 7, 7, src, srcstride, dst, > dststride, height, coeffIdx > +cglobal interp_4tap_horiz_pp_w%1, 5, 7, 7, src, srcstride, dst, > dststride, height > %define coef2 m6 > %define Tm0 m5 > %define Tm1 m4 > @@ -211,7 +218,14 @@ > %define x1 m1 > %define x0 m0 > > -movd coef2, [tab_coeff + r5d * 4] > +mov r5d, r5m > + > +%ifdef PIC > +lea r6, [tab_coeff] > +movd coef2, [r6 + r5 * 4] > +%else > +movd coef2, [tab_coeff + r5 * 4] > +%endif > > pshufd coef2, coef2, 0 > mova x2, [tab_c_512] > _______________________________________________ > x265-devel mailing list > [email protected] > https://mailman.videolan.org/listinfo/x265-devel > -- Steve Borho _______________________________________________ x265-devel mailing list [email protected] https://mailman.videolan.org/listinfo/x265-devel
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