# HG changeset patch # User Murugan Vairavel <muru...@multicorewareinc.com> # Date 1383718677 -19800 # Wed Nov 06 11:47:57 2013 +0530 # Node ID d8385d7126cb3e32a19661f50a9dd850bfdc8b39 # Parent 6b08828ab11c4b5e0244faea9187f162d04e615c asm: pixel_add_pp routine for 16x4 block size
diff -r 6b08828ab11c -r d8385d7126cb source/common/x86/pixel-add8.asm --- a/source/common/x86/pixel-add8.asm Wed Nov 06 11:37:33 2013 +0530 +++ b/source/common/x86/pixel-add8.asm Wed Nov 06 11:47:57 2013 +0530 @@ -298,3 +298,40 @@ PIXELADD_PP_W8_H4 8, 16 PIXELADD_PP_W8_H4 8, 32 +;----------------------------------------------------------------------------- +; void pixel_add_pp_c_16x4(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1); +;----------------------------------------------------------------------------- +INIT_XMM sse2 +cglobal pixel_add_pp_16x4, 4, 6, 8, dest, deststride, src0, src1 + +mov r4d, r4m +mov r5d, r5m + +movu m0, [r2] +movu m1, [r3] + +movu m2, [r2 + r4] +movu m3, [r3 + r5] + +movu m4, [r2 + 2 * r4] +movu m5, [r3 + 2 * r5] + +lea r2, [r2 + 2 * r4] +lea r3, [r3 + 2 * r5] + +movu m6, [r2 + r4] +movu m7, [r3 + r5] + +paddusb m0, m1 +paddusb m2, m3 +paddusb m4, m5 +paddusb m6, m7 + +movu [r0], m0 +movu [r0 + r1], m2 +movu [r0 + 2 * r1], m4 + +lea r0, [r0 + 2 * r1] +movu [r0 + r1], m6 + +RET _______________________________________________ x265-devel mailing list x265-devel@videolan.org https://mailman.videolan.org/listinfo/x265-devel
