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At 2015-03-04 10:46:54,[email protected] wrote: ># HG changeset patch ># User David T Yuen <[email protected]> ># Date 1425436821 28800 ># Node ID c53b456ad909eeab8d83f8e0817e641d174cc706 ># Parent b70e945ad4ce15461b1c0187dc0023b5d4a640f4 >asm:intra pred planar4 sse2 > >This replaces c code for systems using ssse3 to sse2 processors >The code is backported from intrapred planar4 sse4 > >64-bit > >./test/TestBench --testbench intrapred | grep intra_planar_4x4 >intra_planar_4x4 1.16x 507.48 587.52 > >32-bit > >./test/TestBench --testbench intrapred | grep intra_planar_4x4 >intra_planar_4x4 1.56x 532.49 832.30 > >diff -r b70e945ad4ce -r c53b456ad909 source/common/x86/asm-primitives.cpp >--- a/source/common/x86/asm-primitives.cpp Mon Mar 02 19:52:11 2015 -0800 >+++ b/source/common/x86/asm-primitives.cpp Tue Mar 03 18:40:21 2015 -0800 >@@ -1209,6 +1209,8 @@ > p.cu[BLOCK_16x16].intra_pred[DC_IDX] = x265_intra_pred_dc16_sse2; > p.cu[BLOCK_32x32].intra_pred[DC_IDX] = x265_intra_pred_dc32_sse2; > >+ p.cu[BLOCK_4x4].intra_pred[PLANAR_IDX] = x265_intra_pred_planar4_sse2; >+ > p.cu[BLOCK_4x4].calcresidual = x265_getResidual4_sse2; > p.cu[BLOCK_8x8].calcresidual = x265_getResidual8_sse2; > >diff -r b70e945ad4ce -r c53b456ad909 source/common/x86/intrapred.h >--- a/source/common/x86/intrapred.h Mon Mar 02 19:52:11 2015 -0800 >+++ b/source/common/x86/intrapred.h Tue Mar 03 18:40:21 2015 -0800 >@@ -35,6 +35,7 @@ > void x265_intra_pred_dc16_sse4(pixel* dst, intptr_t dstStride, const pixel* > srcPix, int, int filter); > void x265_intra_pred_dc32_sse4(pixel* dst, intptr_t dstStride, const pixel* > srcPix, int, int filter); > >+void x265_intra_pred_planar4_sse2(pixel* dst, intptr_t dstStride, const >pixel* srcPix, int, int); > void x265_intra_pred_planar4_sse4(pixel* dst, intptr_t dstStride, const > pixel* srcPix, int, int); > void x265_intra_pred_planar8_sse4(pixel* dst, intptr_t dstStride, const > pixel* srcPix, int, int); > void x265_intra_pred_planar16_sse4(pixel* dst, intptr_t dstStride, const > pixel* srcPix, int, int); >diff -r b70e945ad4ce -r c53b456ad909 source/common/x86/intrapred8.asm >--- a/source/common/x86/intrapred8.asm Mon Mar 02 19:52:11 2015 -0800 >+++ b/source/common/x86/intrapred8.asm Tue Mar 03 18:40:21 2015 -0800 >@@ -533,6 +533,61 @@ > %endrep > RET > >+;--------------------------------------------------------------------------------------- >+; void intra_pred_planar(pixel* dst, intptr_t dstStride, pixel*srcPix, int, >int filter) >+;--------------------------------------------------------------------------------------- >+INIT_XMM sse2 >+cglobal intra_pred_planar4, 3,3,5 >+ pxor m0, m0 >+ movh m1, [r2 + 1] >+ punpcklbw m1, m0 >+ movh m2, [r2 + 9] >+ punpcklbw m2, m0 >+ pshufhw m3, m1, 0 ; topRight >+ pshufd m3, m3, 0xAA >+ pshufhw m4, m2, 0 ; bottomLeft >+ pshufd m4, m4, 0xAA >+ >+ pmullw m3, [multi_2Row] ; (x + 1) * topRight >+ pmullw m0, m1, [pw_planar4_1] ; (blkSize - 1 - y) * above[x] >+ paddw m3, [pw_4] >+ paddw m3, m4 >+ paddw m3, m0 >+ psubw m4, m1 >+ >+ pshuflw m1, m2, 0 >+ pmullw m1, [pw_planar4_0] >+ paddw m1, m3 >+ paddw m3, m4 >+ psraw m1, 3 >+ packuswb m1, m1 >+ movd [r0], m1 >+ >+ pshuflw m1, m2, 01010101b >+ pmullw m1, [pw_planar4_0] >+ paddw m1, m3 >+ paddw m3, m4 >+ psraw m1, 3 >+ packuswb m1, m1 >+ movd [r0 + r1], m1 >+ lea r0, [r0 + 2 * r1] >+ >+ pshuflw m1, m2, 10101010b >+ pmullw m1, [pw_planar4_0] >+ paddw m1, m3 >+ paddw m3, m4 >+ psraw m1, 3 >+ packuswb m1, m1 >+ movd [r0], m1 >+ >+ pshuflw m1, m2, 11111111b >+ pmullw m1, [pw_planar4_0] >+ paddw m1, m3 >+ psraw m1, 3 >+ packuswb m1, m1 >+ movd [r0 + r1], m1 >+ RET >+ > ;--------------------------------------------------------------------------------------------- > ; void intra_pred_dc(pixel* dst, intptr_t dstStride, pixel *srcPix, int > dirMode, int bFilter) > ;--------------------------------------------------------------------------------------------- >_______________________________________________ >x265-devel mailing list >[email protected] >https://mailman.videolan.org/listinfo/x265-devel
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