# HG changeset patch
# User Vignesh Vijayakumar
# Date 1504171458 -19800
#      Thu Aug 31 14:54:18 2017 +0530
# Node ID 1fb1948309a0a9218a07e060300b9d5a7ff58321
# Parent  9928b3e5b4d4235bea9ffb22434446e68c3aacdb
x86: AVX512 interp_4tap_horiz_pp_8xN for high bit depth

Color Space i444
Size  |  AVX2 performance | AVX512 performance
----------------------------------------------
8x4   |      5.14x        |       9.51x
8x8   |      6.20x        |      12.75x
8x16  |      6.32x        |      12.44x
8x32  |      6.01x        |      13.68x

diff -r 9928b3e5b4d4 -r 1fb1948309a0 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp      Thu Aug 31 14:24:24 2017 +0530
+++ b/source/common/x86/asm-primitives.cpp      Thu Aug 31 14:54:18 2017 +0530
@@ -2354,6 +2354,10 @@
         p.cu[BLOCK_32x32].copy_cnt = PFX(copy_cnt_32_avx512);
         p.cu[BLOCK_16x16].copy_cnt = PFX(copy_cnt_16_avx512);
 
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_8x4].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x4_avx512);
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_8x8].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x8_avx512);
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x16_avx512);
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_8x32].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x32_avx512);
         p.chroma[X265_CSP_I420].pu[CHROMA_420_16x4].filter_hpp = 
PFX(interp_4tap_horiz_pp_16x4_avx512);
         p.chroma[X265_CSP_I420].pu[CHROMA_420_16x8].filter_hpp = 
PFX(interp_4tap_horiz_pp_16x8_avx512);
         p.chroma[X265_CSP_I420].pu[CHROMA_420_16x12].filter_hpp = 
PFX(interp_4tap_horiz_pp_16x12_avx512);
@@ -2364,6 +2368,12 @@
         p.chroma[X265_CSP_I420].pu[CHROMA_420_32x24].filter_hpp = 
PFX(interp_4tap_horiz_pp_32x24_avx512);
         p.chroma[X265_CSP_I420].pu[CHROMA_420_32x32].filter_hpp = 
PFX(interp_4tap_horiz_pp_32x32_avx512);
 
+        p.chroma[X265_CSP_I422].pu[CHROMA_422_8x4].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x4_avx512);
+        p.chroma[X265_CSP_I422].pu[CHROMA_422_8x8].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x8_avx512);
+        p.chroma[X265_CSP_I422].pu[CHROMA_422_8x12].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x12_avx512);
+        p.chroma[X265_CSP_I422].pu[CHROMA_422_8x16].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x16_avx512);
+        p.chroma[X265_CSP_I422].pu[CHROMA_422_8x32].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x32_avx512);
+        p.chroma[X265_CSP_I422].pu[CHROMA_422_8x64].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x64_avx512);
         p.chroma[X265_CSP_I422].pu[CHROMA_422_16x8].filter_hpp = 
PFX(interp_4tap_horiz_pp_16x8_avx512);
         p.chroma[X265_CSP_I422].pu[CHROMA_422_16x16].filter_hpp = 
PFX(interp_4tap_horiz_pp_16x16_avx512);
         p.chroma[X265_CSP_I422].pu[CHROMA_422_16x24].filter_hpp = 
PFX(interp_4tap_horiz_pp_16x24_avx512);
@@ -2374,6 +2384,10 @@
         p.chroma[X265_CSP_I422].pu[CHROMA_422_32x48].filter_hpp = 
PFX(interp_4tap_horiz_pp_32x48_avx512);
         p.chroma[X265_CSP_I422].pu[CHROMA_422_32x64].filter_hpp = 
PFX(interp_4tap_horiz_pp_32x64_avx512);
 
+        p.chroma[X265_CSP_I444].pu[LUMA_8x4].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x4_avx512);
+        p.chroma[X265_CSP_I444].pu[LUMA_8x8].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x8_avx512);
+        p.chroma[X265_CSP_I444].pu[LUMA_8x16].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x16_avx512);
+        p.chroma[X265_CSP_I444].pu[LUMA_8x32].filter_hpp = 
PFX(interp_4tap_horiz_pp_8x32_avx512);
         p.chroma[X265_CSP_I444].pu[LUMA_16x4].filter_hpp = 
PFX(interp_4tap_horiz_pp_16x4_avx512);
         p.chroma[X265_CSP_I444].pu[LUMA_16x8].filter_hpp = 
PFX(interp_4tap_horiz_pp_16x8_avx512);
         p.chroma[X265_CSP_I444].pu[LUMA_16x12].filter_hpp = 
PFX(interp_4tap_horiz_pp_16x12_avx512);
diff -r 9928b3e5b4d4 -r 1fb1948309a0 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm  Thu Aug 31 14:24:24 2017 +0530
+++ b/source/common/x86/ipfilter16.asm  Thu Aug 31 14:54:18 2017 +0530
@@ -5082,6 +5082,49 @@
 
;-------------------------------------------------------------------------------------------------------------
 ;ipfilter_chroma_avx512 code start
 
;-------------------------------------------------------------------------------------------------------------
+%macro PROCESS_IPFILTER_CHROMA_PP_8x4_AVX512 0
+    ; register map
+    ; m0 , m1 interpolate coeff
+    ; m2 , m3  shuffle order table
+    ; m4 - pd_32
+    ; m5 - zero
+    ; m6 - pw_pixel_max
+
+    movu            xm7,       [r0]
+    vinserti32x4    m7,        [r0 + r1],      1
+    vinserti32x4    m7,        [r0 + 2 * r1],  2
+    vinserti32x4    m7,        [r0 + r6],      3
+
+    pshufb          m9,        m7,        m3
+    pshufb          m7,        m2
+    pmaddwd         m7,        m0
+    pmaddwd         m9,        m1
+    paddd           m7,        m9
+    paddd           m7,        m4
+    psrad           m7,        6
+
+    movu            xm8,       [r0 + 8]
+    vinserti32x4    m8,        [r0 + r1 + 8],      1
+    vinserti32x4    m8,        [r0 + 2 * r1 + 8],  2
+    vinserti32x4    m8,        [r0 + r6 + 8],      3
+
+    pshufb          m9,        m8,        m3
+    pshufb          m8,        m2
+    pmaddwd         m8,        m0
+    pmaddwd         m9,        m1
+    paddd           m8,        m9
+    paddd           m8,        m4
+    psrad           m8,        6
+
+    packusdw        m7,        m8
+    CLIPW           m7,        m5,        m6
+    pshufb          m7,        m10
+    movu            [r2],      xm7
+    vextracti32x4   [r2 + r3],     m7,        1
+    vextracti32x4   [r2 + 2 * r3], m7,        2
+    vextracti32x4   [r2 + r7],     m7,        3
+%endmacro
+
 %macro PROCESS_IPFILTER_CHROMA_PP_16x2_AVX512 0
     ; register map
     ; m0 , m1 interpolate coeff
@@ -5367,6 +5410,71 @@
 ; void interp_4tap_horiz_pp(pixel *src, intptr_t srcStride, int16_t *dst, 
intptr_t dstStride, int coeffIdx
 
;-------------------------------------------------------------------------------------------------------------
 INIT_ZMM avx512
+cglobal interp_4tap_horiz_pp_8x4, 5,8,11
+    add             r1d, r1d
+    add             r3d, r3d
+    sub             r0, 2
+    mov             r4d, r4m
+    lea             r6, [3 * r1]
+    lea             r7, [3 * r3]
+%ifdef PIC
+    lea             r5, [tab_ChromaCoeff]
+    vpbroadcastd    m0, [r5 + r4 * 8]
+    vpbroadcastd    m1, [r5 + r4 * 8 + 4]
+%else
+    vpbroadcastd    m0, [tab_ChromaCoeff + r4 * 8]
+    vpbroadcastd    m1, [tab_ChromaCoeff + r4 * 8 + 4]
+%endif
+    vbroadcasti32x8 m2, [interp8_hpp_shuf1_load_avx512]
+    vbroadcasti32x8 m3, [interp8_hpp_shuf2_load_avx512]
+    vbroadcasti32x8 m4, [pd_32]
+    pxor            m5, m5
+    vbroadcasti32x8 m6, [pw_pixel_max]
+    vbroadcasti32x8 m10, [interp8_hpp_shuf1_store_avx512]
+
+    PROCESS_IPFILTER_CHROMA_PP_8x4_AVX512
+    RET
+
+INIT_ZMM avx512
+%macro IPFILTER_CHROMA_AVX512_8xN 1
+cglobal interp_4tap_horiz_pp_8x%1, 5,8,11
+    add             r1d, r1d
+    add             r3d, r3d
+    sub             r0, 2
+    mov             r4d, r4m
+    lea             r6, [3 * r1]
+    lea             r7, [3 * r3]
+%ifdef PIC
+    lea             r5, [tab_ChromaCoeff]
+    vpbroadcastd    m0, [r5 + r4 * 8]
+    vpbroadcastd    m1, [r5 + r4 * 8 + 4]
+%else
+    vpbroadcastd    m0, [tab_ChromaCoeff + r4 * 8]
+    vpbroadcastd    m1, [tab_ChromaCoeff + r4 * 8 + 4]
+%endif
+    vbroadcasti32x8 m2, [interp8_hpp_shuf1_load_avx512]
+    vbroadcasti32x8 m3, [interp8_hpp_shuf2_load_avx512]
+    vbroadcasti32x8 m4, [pd_32]
+    pxor            m5, m5
+    vbroadcasti32x8 m6, [pw_pixel_max]
+    vbroadcasti32x8 m10, [interp8_hpp_shuf1_store_avx512]
+
+%rep %1/4 - 1
+    PROCESS_IPFILTER_CHROMA_PP_8x4_AVX512
+    lea             r0, [r0 + 4 * r1]
+    lea             r2, [r2 + 4 * r3]
+%endrep
+    PROCESS_IPFILTER_CHROMA_PP_8x4_AVX512
+    RET
+%endmacro
+
+IPFILTER_CHROMA_AVX512_8xN 8
+IPFILTER_CHROMA_AVX512_8xN 12
+IPFILTER_CHROMA_AVX512_8xN 16
+IPFILTER_CHROMA_AVX512_8xN 32
+IPFILTER_CHROMA_AVX512_8xN 64
+
+INIT_ZMM avx512
 %macro IPFILTER_CHROMA_AVX512_16xN 1
 cglobal interp_4tap_horiz_pp_16x%1, 5,6,11
     add             r1d, r1d
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