# HG changeset patch
# User Vignesh Vijayakumar
# Date 1504169664 -19800
# Thu Aug 31 14:24:24 2017 +0530
# Node ID 9928b3e5b4d4235bea9ffb22434446e68c3aacdb
# Parent 052b8b5061d84b791489c01e114a0441f96e4ec2
x86: AVX512 interp_4tap_horiz_pp_48x64 for high bit depth
AVX2 performance : 9.46x
AVX512 performance : 18.97x
diff -r 052b8b5061d8 -r 9928b3e5b4d4 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu Aug 31 13:03:39 2017 +0530
+++ b/source/common/x86/asm-primitives.cpp Thu Aug 31 14:24:24 2017 +0530
@@ -2389,6 +2389,7 @@
p.chroma[X265_CSP_I444].pu[LUMA_64x32].filter_hpp =
PFX(interp_4tap_horiz_pp_64x32_avx512);
p.chroma[X265_CSP_I444].pu[LUMA_64x48].filter_hpp =
PFX(interp_4tap_horiz_pp_64x48_avx512);
p.chroma[X265_CSP_I444].pu[LUMA_64x64].filter_hpp =
PFX(interp_4tap_horiz_pp_64x64_avx512);
+ p.chroma[X265_CSP_I444].pu[LUMA_48x64].filter_hpp =
PFX(interp_4tap_horiz_pp_48x64_avx512);
}
}
diff -r 052b8b5061d8 -r 9928b3e5b4d4 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm Thu Aug 31 13:03:39 2017 +0530
+++ b/source/common/x86/ipfilter16.asm Thu Aug 31 14:24:24 2017 +0530
@@ -5175,6 +5175,90 @@
movu [r2 + r3], m7
%endmacro
+%macro PROCESS_IPFILTER_CHROMA_PP_48x2_AVX512 0
+ ; register map
+ ; m0 , m1 interpolate coeff
+ ; m2 , m3 shuffle order table
+ ; m4 - pd_32
+ ; m5 - zero
+ ; m6 - pw_pixel_max
+
+ movu m7, [r0]
+ movu m8, [r0 + 8]
+
+ pshufb m9, m7, m3
+ pshufb m7, m2
+ pmaddwd m7, m0
+ pmaddwd m9, m1
+ paddd m7, m9
+ paddd m7, m4
+ psrad m7, 6
+
+ pshufb m9, m8, m3
+ pshufb m8, m2
+ pmaddwd m8, m0
+ pmaddwd m9, m1
+ paddd m8, m9
+ paddd m8, m4
+ psrad m8, 6
+
+ packusdw m7, m8
+ CLIPW m7, m5, m6
+ pshufb m7, m10
+ movu [r2], m7
+
+ movu m7, [r0 + r1]
+ movu m8, [r0 + r1 + 8]
+
+ pshufb m9, m7, m3
+ pshufb m7, m2
+ pmaddwd m7, m0
+ pmaddwd m9, m1
+ paddd m7, m9
+ paddd m7, m4
+ psrad m7, 6
+
+ pshufb m9, m8, m3
+ pshufb m8, m2
+ pmaddwd m8, m0
+ pmaddwd m9, m1
+ paddd m8, m9
+ paddd m8, m4
+ psrad m8, 6
+
+ packusdw m7, m8
+ CLIPW m7, m5, m6
+ pshufb m7, m10
+ movu [r2 + r3], m7
+
+ movu ym7, [r0 + mmsize]
+ vinserti32x8 m7, [r0 + r1 + mmsize], 1
+ movu ym8, [r0 + mmsize + 8]
+ vinserti32x8 m8, [r0 + r1 + mmsize + 8], 1
+
+ pshufb m9, m7, m3
+ pshufb m7, m2
+ pmaddwd m7, m0
+ pmaddwd m9, m1
+ paddd m7, m9
+ paddd m7, m4
+ psrad m7, 6
+
+ pshufb m9, m8, m3
+ pshufb m8, m2
+ pmaddwd m8, m0
+ pmaddwd m9, m1
+ paddd m8, m9
+ paddd m8, m4
+ psrad m8, 6
+
+ packusdw m7, m8
+ CLIPW m7, m5, m6
+ pshufb m7, m10
+ movu [r2 + mmsize], ym7
+ vextracti32x8 [r2 + r3 + mmsize], m7, 1
+%endmacro
+
%macro PROCESS_IPFILTER_CHROMA_PP_64x2_AVX512 0
; register map
; m0 , m1 interpolate coeff
@@ -5394,6 +5478,35 @@
IPFILTER_CHROMA_AVX512_64xN 32
IPFILTER_CHROMA_AVX512_64xN 48
IPFILTER_CHROMA_AVX512_64xN 64
+
+INIT_ZMM avx512
+cglobal interp_4tap_horiz_pp_48x64, 5,6,11
+ add r1d, r1d
+ add r3d, r3d
+ sub r0, 2
+ mov r4d, r4m
+%ifdef PIC
+ lea r5, [tab_ChromaCoeff]
+ vpbroadcastd m0, [r5 + r4 * 8]
+ vpbroadcastd m1, [r5 + r4 * 8 + 4]
+%else
+ vpbroadcastd m0, [tab_ChromaCoeff + r4 * 8]
+ vpbroadcastd m1, [tab_ChromaCoeff + r4 * 8 + 4]
+%endif
+ vbroadcasti32x8 m2, [interp8_hpp_shuf1_load_avx512]
+ vbroadcasti32x8 m3, [interp8_hpp_shuf2_load_avx512]
+ vbroadcasti32x8 m4, [pd_32]
+ pxor m5, m5
+ vbroadcasti32x8 m6, [pw_pixel_max]
+ vbroadcasti32x8 m10, [interp8_hpp_shuf1_store_avx512]
+
+%rep 31
+ PROCESS_IPFILTER_CHROMA_PP_48x2_AVX512
+ lea r0, [r0 + 2 * r1]
+ lea r2, [r2 + 2 * r3]
+%endrep
+ PROCESS_IPFILTER_CHROMA_PP_48x2_AVX512
+ RET
;-------------------------------------------------------------------------------------------------------------
;ipfilter_chroma_avx512 code end
;-------------------------------------------------------------------------------------------------------------
\ No newline at end of file
_______________________________________________
x265-devel mailing list
x265-devel@videolan.org
https://mailman.videolan.org/listinfo/x265-devel
