# HG changeset patch
# User Vignesh Vijayakumar<vign...@multicorewareinc.com>
# Date 1511763911 -19800
#      Mon Nov 27 11:55:11 2017 +0530
# Node ID c990e193c36815048e9b96bed7b521f3d6954f75
# Parent  3de51f6e7ff7d4d8d67e52f25bde15efd6b2fd57
x86: AVX512 interp_8tap_vert_ss_32xN

Size  |  AVX2 performance | AVX512 performance
----------------------------------------------
32x8  |       9.51x       |      18.94x
32x16 |      10.61x       |      19.76x
32x24 |      10.54x       |      19.84x
32x32 |      11.16x       |      19.70x
32x64 |      10.94x       |      19.75x

diff -r 3de51f6e7ff7 -r c990e193c368 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp      Thu Nov 23 15:52:37 2017 +0530
+++ b/source/common/x86/asm-primitives.cpp      Mon Nov 27 11:55:11 2017 +0530
@@ -4962,6 +4962,12 @@
         p.chroma[X265_CSP_I444].pu[LUMA_64x16].filter_vss = 
PFX(interp_4tap_vert_ss_64x16_avx512);
         p.chroma[X265_CSP_I444].pu[LUMA_48x64].filter_vss = 
PFX(interp_4tap_vert_ss_48x64_avx512);
 
+        p.pu[LUMA_32x64].luma_vss = PFX(interp_8tap_vert_ss_32x64_avx512);
+        p.pu[LUMA_32x32].luma_vss = PFX(interp_8tap_vert_ss_32x32_avx512);
+        p.pu[LUMA_32x24].luma_vss = PFX(interp_8tap_vert_ss_32x24_avx512);
+        p.pu[LUMA_32x16].luma_vss = PFX(interp_8tap_vert_ss_32x16_avx512);
+        p.pu[LUMA_32x8].luma_vss = PFX(interp_8tap_vert_ss_32x8_avx512);
+
         p.cu[BLOCK_8x8].dct = PFX(dct8_avx512);
         p.cu[BLOCK_8x8].idct = PFX(idct8_avx512);
         p.cu[BLOCK_16x16].idct = PFX(idct16_avx512);
diff -r 3de51f6e7ff7 -r c990e193c368 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm   Thu Nov 23 15:52:37 2017 +0530
+++ b/source/common/x86/ipfilter8.asm   Mon Nov 27 11:55:11 2017 +0530
@@ -192,6 +192,27 @@
                                         times 16 dw -2, 10
                                         times 16 dw 58, -2
 
+ALIGN 64
+const pw_LumaCoeffVer_avx512,           times 16 dw 0, 0
+                                        times 16 dw 0, 64
+                                        times 16 dw 0, 0
+                                        times 16 dw 0, 0
+
+                                        times 16 dw -1, 4
+                                        times 16 dw -10, 58
+                                        times 16 dw 17, -5
+                                        times 16 dw 1, 0
+
+                                        times 16 dw -1, 4
+                                        times 16 dw -11, 40
+                                        times 16 dw 40, -11
+                                        times 16 dw 4, -1
+
+                                        times 16 dw 0, 1
+                                        times 16 dw -5, 17
+                                        times 16 dw 58, -10
+                                        times 16 dw 4, -1
+
 const tab_c_64_n64, times 8 db 64, -64
 
 const interp8_hps_shuf,     dd 0, 4, 1, 5, 2, 6, 3, 7
@@ -12786,6 +12807,133 @@
 %if ARCH_X86_64 == 1
     IPFILTER_LUMA_PS_48xN_AVX512 64
 %endif
+
+;-------------------------------------------------------------------------------------------------------------
+;avx512 luma_vss code start
+;-------------------------------------------------------------------------------------------------------------
+%macro PROCESS_LUMA_VERT_SS_32x2_AVX512 0
+    movu                 m1,                  [r0]                           
;0 row
+    movu                 m3,                  [r0 + r1]                      
;1 row
+    punpcklwd            m0,                  m1,                     m3
+    pmaddwd              m0,                  m15
+    punpckhwd            m1,                  m3
+    pmaddwd              m1,                  m15
+
+    movu                 m4,                  [r0 + 2 * r1]                  
;2 row
+    punpcklwd            m2,                  m3,                     m4
+    pmaddwd              m2,                  m15
+    punpckhwd            m3,                  m4
+    pmaddwd              m3,                  m15
+
+    movu                 m5,                  [r0 + r7]                      
;3 row
+    punpcklwd            m6,                  m4,                     m5
+    pmaddwd              m6,                  m16
+    punpckhwd            m4,                  m5
+    pmaddwd              m4,                  m16
+
+    paddd                m0,                  m6
+    paddd                m1,                  m4
+
+    movu                 m4,                  [r0 + 4 * r1]                  
;4 row
+    punpcklwd            m6,                  m5,                     m4
+    pmaddwd              m6,                  m16
+    punpckhwd            m5,                  m4
+    pmaddwd              m5,                  m16
+
+    paddd                m2,                  m6
+    paddd                m3,                  m5
+
+    lea                  r6,                  [r0 + 4 * r1]
+
+    movu                 m11,                 [r6 + r1]                      
;5 row
+    punpcklwd            m8,                  m4,                     m11
+    pmaddwd              m8,                  m17
+    punpckhwd            m4,                  m11
+    pmaddwd              m4,                  m17
+
+    movu                 m12,                 [r6 + 2 * r1]                  
;6 row
+    punpcklwd            m10,                 m11,                    m12
+    pmaddwd              m10,                 m17
+    punpckhwd            m11,                 m12
+    pmaddwd              m11,                 m17
+
+    movu                 m13,                 [r6 + r7]                      
;7 row
+    punpcklwd            m14,                 m12,                    m13
+    pmaddwd              m14,                 m18
+    punpckhwd            m12,                 m13
+    pmaddwd              m12,                 m18
+
+    paddd                m8,                  m14
+    paddd                m4,                  m12
+    paddd                m0,                  m8
+    paddd                m1,                  m4
+
+    movu                 m12,                 [r6 + 4 * r1]                 ; 
8 row
+    punpcklwd            m14,                 m13,                    m12
+    pmaddwd              m14,                 m18
+    punpckhwd            m13,                 m12
+    pmaddwd              m13,                 m18
+
+    paddd                m10,                 m14
+    paddd                m11,                 m13
+    paddd                m2,                  m10
+    paddd                m3,                  m11
+
+    psrad                m0,                  6
+    psrad                m1,                  6
+    psrad                m2,                  6
+    psrad                m3,                  6
+
+    packssdw             m0,                  m1
+    packssdw             m2,                  m3
+
+    movu                 [r2],                m0
+    movu                 [r2 + r3],           m2
+%endmacro
+;-----------------------------------------------------------------------------------------------------------------
+; void interp_8tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, 
intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------------------------------------------
+%macro FILTER_VER_SS_LUMA_32xN_AVX512 1
+INIT_ZMM avx512
+cglobal interp_8tap_vert_ss_32x%1, 5, 8, 19
+    add                   r1d,                r1d
+    add                   r3d,                r3d
+    lea                   r7,                 [3 * r1]
+    sub                   r0,                 r7
+    shl                   r4d,                8
+%ifdef PIC
+    lea                   r5,                 [pw_LumaCoeffVer_avx512]
+    mova                  m15,                [r5 + r4]
+    mova                  m16,                [r5 + r4 + 1 * mmsize]
+    mova                  m17,                [r5 + r4 + 2 * mmsize]
+    mova                  m18,                [r5 + r4 + 3 * mmsize]
+%else
+    lea                   r5,                 [pw_LumaCoeffVer_avx512 + r4]
+    mova                  m15,                [r5]
+    mova                  m16,                [r5 + 1 * mmsize]
+    mova                  m17,                [r5 + 2 * mmsize]
+    mova                  m18,                [r5 + 3 * mmsize]
+%endif
+
+%rep %1/2 - 1
+    PROCESS_LUMA_VERT_SS_32x2_AVX512
+    lea                   r0,                 [r0 + 2 * r1]
+    lea                   r2,                 [r2 + 2 * r3]
+%endrep
+    PROCESS_LUMA_VERT_SS_32x2_AVX512
+    RET
+%endmacro
+
+%if ARCH_X86_64
+    FILTER_VER_SS_LUMA_32xN_AVX512 8
+    FILTER_VER_SS_LUMA_32xN_AVX512 16
+    FILTER_VER_SS_LUMA_32xN_AVX512 32
+    FILTER_VER_SS_LUMA_32xN_AVX512 24
+    FILTER_VER_SS_LUMA_32xN_AVX512 64
+%endif
+;-------------------------------------------------------------------------------------------------------------
+;avx512 luma_vss code end
+;-------------------------------------------------------------------------------------------------------------
 
;-------------------------------------------------------------------------------------------------------------
 ;ipfilter_luma_avx512 code end
 
;-------------------------------------------------------------------------------------------------------------
\ No newline at end of file
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