Hello, Everyone
I have a power supply symbol which contains a parameter for the net
name. The parameter is used in a global pin. When creating a pcb
netlist, the net name is blank and instances of the symbol with
different net name parameters are connected. Here is the actual and
expected netlist output:
========= ACTUAL OUTPUT START =========
J1-1 J1-2 J1-3
gnd J1-4
========= ACTUAL OUTPUT END ===========
========= EXPECTED OUTPUT START =======
v12plus J1-1
v5plus J1-2
v3plus J1-3
gnd J1-4
========= EXPECTED OUTPUT END =========
Is this a supported use case? The tutorial has a section about
parameters in global pins, but the example uses spice netlists, not pcb.
I've attached my schematic for reference.
-- Daniel
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