On Fri, 9 May 2025, Roger Pau Monné wrote:
> On Thu, May 08, 2025 at 06:46:07AM -0400, Stewart Hildebrand wrote:
> > From: Oleksandr Andrushchenko <oleksandr_andrushche...@epam.com>
> >
> > There are two originators for the PCI configuration space access:
> > 1. The domain that owns physical host bridge: MMIO handlers are
> > there so we can update vPCI register handlers with the values
> > written by the hardware domain, e.g. physical view of the registers
> > vs guest's view on the configuration space.
> > 2. Guest access to the passed through PCI devices: we need to properly
> > map virtual bus topology to the physical one, e.g. pass the configuration
> > space access to the corresponding physical devices.
> >
> > Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushche...@epam.com>
> > Signed-off-by: Volodymyr Babchuk <volodymyr_babc...@epam.com>
> > Signed-off-by: Stewart Hildebrand <stewart.hildebr...@amd.com>
>
> Reviewed-by: Roger Pau Monné <roger....@citrix.com>
>
> There's the addition of the ASSERTs in vpci_mmio_{read,write}() which
> could do with an ARM maintainer Ack/RB.
Acked-by: Stefano Stabellini <sstabell...@kernel.org>
