On Tue, 12 Sep 2017, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.gr...@arm.com>
> Reviewed-by: Andre Przywara <andre.przyw...@arm.com>
Acked-by: Stefano Stabellini <sstabell...@kernel.org>
> ---
>
> Note that the missing FnV bits present ARMv8 will be added in a
> follow-up patch.
>
> Changes in v2:
> - Add Andre's reviewed-by
> ---
> xen/include/asm-arm/processor.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
> index 9f7a42f86b..bea4a56190 100644
> --- a/xen/include/asm-arm/processor.h
> +++ b/xen/include/asm-arm/processor.h
> @@ -583,9 +583,9 @@ union hsr {
>
> struct hsr_iabt {
> unsigned long ifsc:6; /* Instruction fault status code */
> - unsigned long res0:1;
> + unsigned long res0:1; /* RES0 */
> unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */
> - unsigned long res1:1;
> + unsigned long res1:1; /* RES0 */
> unsigned long eat:1; /* External abort type */
> unsigned long res2:15;
> unsigned long len:1; /* Instruction length */
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