On Fri, Sep 22, 2017 at 07:52:13AM -0600, Jan Beulich wrote: > >>> On 14.09.17 at 14:58, <wei.l...@citrix.com> wrote: > > The l1 mask needs to stay in x86/mm.c while l{2,3,4} masks are only > > needed by PV code. Both x86 common mm code and PV mm code use > > base_disallow_mask and l1 maks. > > > > Export base_disallow_mask and l1 mask in asm-x86/mm.h. > > So that's because in patch 20 you need to keep > get_page_from_l1e() in x86/mm.c, due to being used by shadow > code. But is shadow using the same disallow mask for HVM guests > actually correct? Perhaps it would be better for callers of > get_page_from_l1e() to pass in their disallow masks, even if it > would just so happen that PV and shadow use the same ones?
I think this is a fine idea, fwiw. _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel