On 11/16/2017 03:19 PM, Julien Grall wrote:
> Hi George,
> 
> On 13/11/17 15:41, George Dunlap wrote:
>> Superpage support and PVHVM.
>>
>> Signed-off-by: George Dunlap <george.dun...@citrix.com>
>> ---
>> CC: Ian Jackson <ian.jack...@citrix.com>
>> CC: Wei Liu <wei.l...@citrix.com>
>> CC: Andrew Cooper <andrew.coop...@citrix.com>
>> CC: Jan Beulich <jbeul...@suse.com>
>> CC: Stefano Stabellini <sstabell...@kernel.org>
>> CC: Konrad Wilk <konrad.w...@oracle.com>
>> CC: Tim Deegan <t...@xen.org>
>> CC: Julien Grall <julien.gr...@arm.com>
>> ---
>>   SUPPORT.md | 21 +++++++++++++++++++++
>>   1 file changed, 21 insertions(+)
>>
>> diff --git a/SUPPORT.md b/SUPPORT.md
>> index c884fac7f5..a8c56d13dd 100644
>> --- a/SUPPORT.md
>> +++ b/SUPPORT.md
>> @@ -195,6 +195,27 @@ on embedded platforms.
>>     Enables NUMA aware scheduling in Xen
>>   +## Scalability
>> +
>> +### 1GB/2MB super page support
>> +
>> +    Status, x86 HVM/PVH: : Supported
>> +    Status, ARM: Supported
>> +
>> +NB that this refers to the ability of guests
>> +to have higher-level page table entries point directly to memory,
>> +improving TLB performance.
>> +This is independent of the ARM "page granularity" feature (see below).
> 
> I am not entirely sure about this paragraph for Arm. I understood this
> section as support for stage-2 page-table (aka EPT on x86) but the
> paragraph lead me to believe to it is for guest.

Hmm, yes likely there was some confusion when this was listed.  We
probably should make separate entries for HAP / stage 2 superpage
support and guest PT superpage support.

 -George

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