From: Chen Baozi <baoz...@gmail.com>
According to ARM CPUs bindings, the reg field should match the MPIDR's
affinity bits. We will use AFF0 and AFF1 when constructing the reg value
of the guest at the moment, for it is enough for the current max vcpu
number.
Signed-off-by: Chen Baozi <baoz...@gmail.com>
Acked-by: Ian Campbell <ian.campb...@citrix.com>
Reviewed-by: Julien Grall <julien.gr...@citrix.com>
---
xen/arch/arm/domain_build.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index a156de9..12b46ca 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -712,6 +712,7 @@ static int make_cpus_node(const struct domain *d, void *fdt,
char buf[15];
u32 clock_frequency;
bool_t clock_valid;
+ uint64_t mpidr_aff;
DPRINT("Create cpus node\n");
@@ -761,9 +762,16 @@ static int make_cpus_node(const struct domain *d, void
*fdt,
for ( cpu = 0; cpu < d->max_vcpus; cpu++ )
{
- DPRINT("Create cpu@%u node\n", cpu);
+ /*
+ * According to ARM CPUs bindings, the reg field should match
+ * the MPIDR's affinity bits. We will use AFF0 and AFF1 when
+ * constructing the reg value of the guest at the moment, for it
+ * is enough for the current max vcpu number.
+ */
+ mpidr_aff = vcpuid_to_vaffinity(cpu);
+ DPRINT("Create cpu@%"PRIx64" (logical CPUID: %d) node\n", mpidr_aff,
cpu);
- snprintf(buf, sizeof(buf), "cpu@%u", cpu);
+ snprintf(buf, sizeof(buf), "cpu@%lx", mpidr_aff);
res = fdt_begin_node(fdt, buf);
if ( res )
return res;
@@ -776,7 +784,7 @@ static int make_cpus_node(const struct domain *d, void *fdt,
if ( res )
return res;
- res = fdt_property_cell(fdt, "reg", cpu);
+ res = fdt_property_cell(fdt, "reg", mpidr_aff);
if ( res )
return res;
--
2.1.4
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