>>> On 03.08.16 at 15:11, <andrew.coop...@citrix.com> wrote:
> On 03/08/16 14:04, Jan Beulich wrote:
>> On x86 there's no need for full barriers in loops waiting for some
>> memory location to change. Nor do we need full barriers between two
>> reads and two writes - SMP ones fully suffice (and I actually think
>> they could in fact be dropped, since atomic_*() operations should
>> already provide enough ordering).
> 
> Missing a SoB,

Oops.

> Which "ones" are you referring to?  atomic_*() is only ordered with
> respect to the atomic_t used.

Oh, right - the one followed by atomic_inc() could be converted
to plain barrier() (but not dropped entirely), while the other one
follows an atomic_read() only, and hence can't be dropped. I'll
remove that part of the description.

> Overall, I think the change is correct, so Reviewed-by: Andrew Cooper
> <andrew.coop...@citrix.com>

Thanks.

Jan


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