This fixes a regression introduced by commit ff913f68c9 ("x86/PV:
restrict permitted instructions during memory write emulation")
breaking namely 32-bit PV guests (which commonly use CMPXCHG8B for
certain page table updates).
Reported-by: Andrew Cooper <andrew.coop...@citrix.com>
Signed-off-by: Jan Beulich <jbeul...@suse.com>
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -6566,6 +6566,9 @@ x86_insn_is_mem_write(const struct x86_e
case X86EMUL_OPC(0x0f, 0xba):
return (state->modrm_reg & 7) > 4; /* BTS / BTR / BTC */
+
+ case X86EMUL_OPC(0x0f, 0xc7):
+ return (state->modrm_reg & 7) == 1; /* CMPXCHG{8,16}B */
}
return false;
x86emul: CMPXCHG{8,16}B are memory writes
This fixes a regression introduced by commit ff913f68c9 ("x86/PV:
restrict permitted instructions during memory write emulation")
breaking namely 32-bit PV guests (which commonly use CMPXCHG8B for
certain page table updates).
Reported-by: Andrew Cooper <andrew.coop...@citrix.com>
Signed-off-by: Jan Beulich <jbeul...@suse.com>
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -6566,6 +6566,9 @@ x86_insn_is_mem_write(const struct x86_e
case X86EMUL_OPC(0x0f, 0xba):
return (state->modrm_reg & 7) > 4; /* BTS / BTR / BTC */
+
+ case X86EMUL_OPC(0x0f, 0xc7):
+ return (state->modrm_reg & 7) == 1; /* CMPXCHG{8,16}B */
}
return false;
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