The cpu errata framework was introduced in commit 8b01f6364f "xen/arm:
Detect silicon revision and set cap bits accordingly" and was meant to
detect errata present on any CPUs (via check_local_cpu_errata). However,
the function to check the MIDR (is_affected_midr_range) mistakenly
always use the boot CPU MIDR.

Fix is_affected_midr_range to use the current CPU MIDR.

Reported-by: Stefano Stabellini <>
Signed-off-by: Julien Grall <>

    This should be backported up to Xen 4.7 as the cpu errata framework
    was backported for XSA-254.
 xen/arch/arm/cpuerrata.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c
index 9c7458ef06..c243521ed4 100644
--- a/xen/arch/arm/cpuerrata.c
+++ b/xen/arch/arm/cpuerrata.c
@@ -230,7 +230,7 @@ static int enable_ic_inv_hardening(void *data)
 static bool __maybe_unused
 is_affected_midr_range(const struct arm_cpu_capabilities *entry)
-    return MIDR_IS_CPU_MODEL_RANGE(boot_cpu_data.midr.bits, entry->midr_model,
+    return MIDR_IS_CPU_MODEL_RANGE(current_cpu_data.midr.bits, 

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