On 15/02/18 23:16, Stefano Stabellini wrote:
On top of this series, I think we want to rework how we read the size of
the cacheline. At the moment, we only read it on the boot CPU. But they
may be different on each CPUs.
This series changes the initialization of two virtual registers to make
sure they match the value of the underlying physical cpu.
It also disables cpus different from the boot cpu, unless a newly
introduced command line option is specified. In that case, it explains
how to setup the system to avoid corruptions, which involves manually
specifying the cpu affinity of all domains, because the scheduler still
lacks big.LITTLE support.
So I would replace that variable by reading the cacheline size everytime
from system registers. This should quicker than trying to read the
memory to know the cacheline size.
Note that I suggested this as a small tasks for Outreachy/GSOC.
Xen-devel mailing list