>>> On 19.02.18 at 18:19, <jgr...@suse.com> wrote: > On 19/02/18 17:59, Jan Beulich wrote: >>>>> On 15.02.18 at 13:52, <jgr...@suse.com> wrote: >>> --- a/xen/arch/x86/x86_64/entry.S >>> +++ b/xen/arch/x86/x86_64/entry.S >>> @@ -46,10 +46,13 @@ restore_all_guest: >>> .Lrag_cr3_start: >>> mov VCPU_cr3(%rbx), %r9 >>> GET_STACK_END(dx) >>> - mov STACK_CPUINFO_FIELD(pv_cr3)(%rdx), %rdi >>> + mov STACK_CPUINFO_FIELD(pv_cr3)(%rdx), %rax >>> + cmpb $0, STACK_CPUINFO_FIELD(copy_l4)(%rdx) >>> + je .Lrag_copyend >>> + movb $0, STACK_CPUINFO_FIELD(copy_l4)(%rdx) >> >> Use %bl instead of $0 in both cases (with a comment)? > > Do you really think we should add such a micro optimization relying > on the vcpu pointer being aligned to page boundary? And are you sure > adding the register dependency isn't hurting more than we will gain > from saving an instruction byte?
Well, both of what you say are the precise reasons why I've asked a question rather than asking for the change to be done unconditionally. I'm not really worried about the register dependency - %rbx is loaded sufficiently much earlier. And the struct-vcpu-is-aligned aspect is why I did suggest adding a comment; I assume you realize we can't easily break that alignment, hence I see no significant risk here. But I'm not going to insist, and I'm open for further counter arguments. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
