On Tue, Feb 20, 2018 at 07:23:44PM -0500, Boris Ostrovsky wrote:
> On 02/20/2018 03:56 AM, Roger Pau Monne wrote:
> > At the moment this is currently set at VMC{S/B} creation and not changed,
> > but further patches are going to change the CR4 mask at runtime.
> >
> > Signed-off-by: Roger Pau Monné <roger....@citrix.com>
> > ---
> > Cc: Boris Ostrovsky <boris.ostrov...@oracle.com>
> > Cc: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com>
> > Cc: Jan Beulich <jbeul...@suse.com>
> > Cc: Andrew Cooper <andrew.coop...@citrix.com>
> > Cc: Jun Nakajima <jun.nakaj...@intel.com>
> > Cc: Kevin Tian <kevin.t...@intel.com>
> > ---
> > Changes since v2:
> >  - Introduce masks only for CR4 and CR0.
> >
> > Changes since v1:
> >  - New in this version.
> > ---
> >  xen/arch/x86/hvm/svm/vmcb.c    | 1 +
> >  xen/arch/x86/hvm/vmx/vmcs.c    | 1 +
> >  xen/include/asm-x86/hvm/vcpu.h | 4 ++++
> >  3 files changed, 6 insertions(+)
> >
> > diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
> > index 0e6cba5b7b..beeafad235 100644
> > --- a/xen/arch/x86/hvm/svm/vmcb.c
> > +++ b/xen/arch/x86/hvm/svm/vmcb.c
> > @@ -169,6 +169,7 @@ static int construct_vmcb(struct vcpu *v)
> >      vmcb->tr.base = 0;
> >      vmcb->tr.limit = 0xff;
> >  
> > +    v->arch.hvm_vcpu.cr0_host_mask = v->arch.hvm_vcpu.cr4_host_mask = ~0UL;
> >      v->arch.hvm_vcpu.guest_cr[0] = X86_CR0_PE | X86_CR0_ET;
> >      hvm_update_guest_cr(v, 0);
> 
> 
> Is there a reason for setting those fields? SVM won't use them, will it?

No, SVM won't use them but IMHO it's good for coherency to also set
them. The initial plan was to do something similar for SVM, but I
couldn't find how to do selective CR4 trapping for SVM.

I could move this inside of arch_vmx_struct if it seems better, but I
was expecting to be able to do something similar for SVM in order to
avoid needlessly trapping CR4.

Thanks, Roger.

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