On 21/02/18 16:37, Julien Grall wrote:

On 21/02/18 16:27, Andre Przywara wrote:


On 15/02/18 15:02, Julien Grall wrote:
Currently, the behavior of do_common_cpu will slightly change depending
on the PSCI version passed in parameter. Looking at the code, more the
specific 0.2 behavior could move out of the function or adapted for 0.1:

     - x0/r0 can be updated on PSCI 0.1 because general purpose registers
     are undefined upon CPU on.

Is that explicitly mentioned somewhere in the spec? I couldn't find
anything in the original DEN0022A. Or is that because it does *not*
mention anything about the GPR state that we are safe to put anything in

Because nothing tells you what is the GPR state when booting a secondary CPUs in the ARM ARM. This is done to the specification to decide what would be the value.

Today Xen will zero them, but it is not because of specific requirements just to avoid leak hypervisor content in those registers.

I have added in the commit message:
"This was deduced from the spec not mentioning the state of general purpose registers on CPU on."


Julien Grall

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