On 15/03/18 17:02, Jan Beulich wrote: >>>> On 15.03.18 at 17:43, <andrew.coop...@citrix.com> wrote: >> +static inline void enable_nmis(void) >> +{ >> + unsigned long tmp; >> + >> + asm volatile ( "mov %%rsp, %[sp] \n\t" >> + "push %[ss] \n\t" >> + "push %[sp] \n\t" >> + "pushf \n\t" >> + "push %[cs] \n\t" >> + "lea 1f(%%rip), %[ip] \n\t" >> + "push %[ip] \n\t" >> + "iretq; 1: \n\t" >> + : [sp] "=r" (tmp), [ip] "=r" (tmp) > Strictly speaking this needs to be "=&r" in both cases. That'll > guarantee the compiler to pick two distinct registers (not sure > how that ends up being with the code you have), which is > more than we need want. How about having just a single > [tmp] output? > > With at least the missing & added > Reviewed-by: Jan Beulich <jbeul...@suse.com>
In this case, everything works fine even if the compiler picks the same register. GCC 7.3 picks %rax for sp and %rdx for. Then again, we can get away with a single tmp, so I'll switch to that. ~Andrew _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel