Such field uses bits 55:48, but for the purposes the register will be used use bits 55:49 instead. Bit 48 is used to signal an RTE entry is in remappable format which is not supported by the vIO-APIC.
Use the extended destination ID to store the high bits from the destination ID, thus expanding the size of the destination ID field to 15 bits, allowing an IO-APIC to target APIC IDs up to 32768. Note this is already supported by QEMU/KVM and HyperV. Signed-off-by: Roger Pau Monné <[email protected]> --- xen/arch/x86/hvm/vioapic.c | 3 ++- xen/include/public/arch-x86/hvm/save.h | 4 +++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 553c0f76ef..1f2305c232 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -412,7 +412,8 @@ static void ioapic_inj_irq( static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) { - uint16_t dest = vioapic->redirtbl[pin].fields.dest_id; + uint16_t dest = vioapic->redirtbl[pin].fields.dest_id | + (vioapic->redirtbl[pin].fields.ext_dest_id << 8); uint8_t dest_mode = vioapic->redirtbl[pin].fields.dest_mode; uint8_t delivery_mode = vioapic->redirtbl[pin].fields.delivery_mode; uint8_t vector = vioapic->redirtbl[pin].fields.vector; diff --git a/xen/include/public/arch-x86/hvm/save.h b/xen/include/public/arch-x86/hvm/save.h index 773a380bc2..14a5d94588 100644 --- a/xen/include/public/arch-x86/hvm/save.h +++ b/xen/include/public/arch-x86/hvm/save.h @@ -376,7 +376,9 @@ union vioapic_redir_entry uint8_t trig_mode:1; uint8_t mask:1; uint8_t reserve:7; - uint8_t reserved[4]; + uint8_t reserved[3]; + uint8_t :1; + uint8_t ext_dest_id:7; uint8_t dest_id; } fields; }; -- 2.34.1
