On 05.08.2022 11:51, Marek Marczykowski-Górecki wrote: > On Fri, Aug 05, 2022 at 09:23:32AM +0200, Jan Beulich wrote: >> On 26.07.2022 05:23, Marek Marczykowski-Górecki wrote: >>> +static struct xhci_trb evt_trb[DBC_TRB_RING_CAP]; >>> +static struct xhci_trb out_trb[DBC_TRB_RING_CAP]; >>> +static struct xhci_trb in_trb[DBC_TRB_RING_CAP]; >>> +static struct xhci_erst_segment erst __aligned(64); >>> +static struct xhci_dbc_ctx ctx __aligned(64); >>> +static uint8_t out_wrk_buf[DBC_WORK_RING_CAP] __aligned(DBC_PAGE_SIZE); >> >> I've been trying to identify the reason for the alignment here, >> compared to the other buffers which are no longer page-aligned. I >> haven't even been able to locate the place where the address of >> this buffer is actually written to hardware; all I could find was >> the respective virt_to_maddr(). Could you please point me at that? > > It's dbc_flush() -> dbc_push_trb(). > And indeed, I think I can drop the alignment when it's moved into > structure dedicated for DMA-accessible buffers.
Why would you be able to drop the alignment then, but not here? Jan
