On 2/14/23 2:48 AM, Jan Beulich wrote:
On 13.02.2023 21:53, Boris Ostrovsky wrote:
On 2/13/23 11:41 AM, Jan Beulich wrote:
On 13.02.2023 17:30, Xenia Ragiadakou wrote:
On 2/13/23 17:11, Jan Beulich wrote:
On 13.02.2023 15:57, Xenia Ragiadakou wrote:
--- a/xen/arch/x86/cpu/Makefile
+++ b/xen/arch/x86/cpu/Makefile
@@ -10,4 +10,6 @@ obj-y += intel.o
obj-y += intel_cacheinfo.o
obj-y += mwait-idle.o
obj-y += shanghai.o
-obj-y += vpmu.o vpmu_amd.o vpmu_intel.o
+obj-y += vpmu.o
+obj-$(CONFIG_AMD_SVM) += vpmu_amd.o
+obj-$(CONFIG_INTEL_VMX) += vpmu_intel.o
This code was moved from hvm/ to cpu/ for the specific reason of also
being used by PV guests. (Sadly the comments at the top weren't
corrected at that time.)
Hmm, the init functions are prefixed with svm/vmx.
Does vpmu depend on svm/vmx support?
There are interactions, but I don't think there's a dependency. You
may want to ask Boris (whom I have now added to Cc).
MSR intercept bits need to be manipulated, which is SVM/VMX-specific.
But that's "interaction", not "dependency" aiui: The intercept bits aren't
relevant for PV guests, are they?
Correct, they are not. All accesses to intercept bits are under is_hvm_vcpu().
So vpmu does not depend on presence of vmx/svm support. (And init routines
shouldn't be prefixed with those)
-boris
