Add a special configuration (CONFIG_AARCH32_V8R) to setup the Cortex-R52
specifics.

Cortex-R52 is an Arm-V8R AArch32 processor.

Refer ARM DDI 0487I.a ID081822, G8-9647, G8.2.112 MIDR,
bits[31:24] = 0x41 , Arm Ltd
bits[23:20] = Implementation defined
bits[19:16] = 0xf , Arch features are individually identified
bits[15:4] = Implementation defined
bits[3:0] = Implementation defined

Thus, the processor id is 0x410f0000 and the processor id mask is
0xff0f0000

Also, there is no special initialization required for R52.

Signed-off-by: Ayan Kumar Halder <ayan.kumar.hal...@amd.com>
---
 xen/arch/arm/Kconfig         |  7 +++++++
 xen/arch/arm/arm32/Makefile  |  1 +
 xen/arch/arm/arm32/proc-v8.S | 32 ++++++++++++++++++++++++++++++++
 3 files changed, 40 insertions(+)
 create mode 100644 xen/arch/arm/arm32/proc-v8.S

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index 61e581b8c2..c45753a2dd 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -3,6 +3,13 @@ config ARM_32
        depends on "$(ARCH)" = "arm32"
        select ARCH_MAP_DOMAIN_PAGE
 
+config AARCH32_V8R
+       bool "AArch32 Arm V8R Support (UNSUPPORTED)" if UNSUPPORTED
+       def_bool n
+       depends on ARM_32
+       help
+         This option enables Armv8-R profile for AArch32.
+
 config ARM_64
        def_bool y
        depends on !ARM_32
diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
index 520fb42054..2ab808a7a8 100644
--- a/xen/arch/arm/arm32/Makefile
+++ b/xen/arch/arm/arm32/Makefile
@@ -8,6 +8,7 @@ obj-y += head.o
 obj-y += insn.o
 obj-$(CONFIG_LIVEPATCH) += livepatch.o
 obj-y += proc-v7.o proc-caxx.o
+obj-$(CONFIG_AARCH32_V8R) += proc-v8.o
 obj-y += smpboot.o
 obj-y += traps.o
 obj-y += vfp.o
diff --git a/xen/arch/arm/arm32/proc-v8.S b/xen/arch/arm/arm32/proc-v8.S
new file mode 100644
index 0000000000..c5a566b165
--- /dev/null
+++ b/xen/arch/arm/arm32/proc-v8.S
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * xen/arch/arm/arm32/proc-v8.S
+ *
+ * AArch32 V8R specific initialization
+ *
+ * Copyright (C) 2023, Advanced Micro Devices, Inc. All Rights Reserved.
+ */
+
+#include <asm/arm32/processor.h>
+#include <asm/sysregs.h>
+
+cr52_init:
+        mov pc, lr
+
+        .section ".proc.info", #alloc
+        .type __v8_cr52_proc_info, #object
+__v8_cr52_proc_info:
+        .long 0x410F0000             /* Cortex-R52 */
+        .long 0xFF0F0000             /* Mask */
+        .long cr52_init
+        .size __v8_cr52_proc_info, . - __v8_cr52_proc_info
+
+        .section ".proc.info", #alloc
+        .type __v8_cr52_proc_info, #object
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1


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