Hi Roger, > On Oct 17, 2023, at 16:29, Roger Pau Monne <[email protected]> wrote: > > The mapping of memory regions below the 1MB mark was all done by the PVH dom0 > builder code, causing the region to be avoided by the arch specific IOMMU > hardware domain initialization code. That lead to the IOMMU being enabled > without reserved regions in the low 1MB identity mapped in the p2m for PVH > hardware domains. Firmware which happens to be missing RMRR/IVMD ranges > describing E820 reserved regions in the low 1MB would transiently trigger > IOMMU > faults until the p2m is populated by the PVH dom0 builder: > > AMD-Vi: IO_PAGE_FAULT: 0000:00:13.1 d0 addr 00000000000eb380 flags 0x20 RW > AMD-Vi: IO_PAGE_FAULT: 0000:00:13.1 d0 addr 00000000000eb340 flags 0 > AMD-Vi: IO_PAGE_FAULT: 0000:00:13.2 d0 addr 00000000000ea1c0 flags 0 > AMD-Vi: IO_PAGE_FAULT: 0000:00:14.5 d0 addr 00000000000eb480 flags 0x20 RW > AMD-Vi: IO_PAGE_FAULT: 0000:00:12.0 d0 addr 00000000000eb080 flags 0x20 RW > AMD-Vi: IO_PAGE_FAULT: 0000:00:14.5 d0 addr 00000000000eb400 flags 0 > AMD-Vi: IO_PAGE_FAULT: 0000:00:12.0 d0 addr 00000000000eb040 flags 0 > > Those errors have been observed on the osstest pinot{0,1} boxes (AMD Fam15h > Opteron(tm) Processor 3350 HE). > > Rely on the IOMMU arch init code to create any identity mappings for reserved > regions in the low 1MB range (like it already does for reserved regions > elsewhere), and leave the mapping of any holes to be performed by the dom0 > builder code. > > Fixes: 6b4f6a31ace1 ('x86/PVH: de-duplicate mappings for first Mb of Dom0 > memory') > Signed-off-by: Roger Pau Monné <[email protected]>
Release-acked-by: Henry Wang <[email protected]> Kind regards, Henry
