Hi Julien,

Thanks for the feedback.

On Tue, May 29, 2018 at 3:19 PM, Julien Grall <julien.gr...@arm.com> wrote:

> Hi,
>
>
> On 15/05/18 12:44, Mirela Simonovic wrote:
>
>> Linux/dom0 accesses OSLSR register when saving CPU context during the
>> suspend procedure. Xen traps access to this register, but has no handling
>> for it. Consequently, Xen injects undef exception to linux, causing it to
>> crash. This patch adds handling of the trapped access to OSLSR as ro/raz.
>>
>> Signed-off-by: Mirela Simonovic <mirela.simono...@aggios.com>
>> Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
>> Acked-by: Julien Grall <julien.gr...@arm.com>
>>
>> ---
>> CC: Stefano Stabellini <sstabell...@kernel.org>
>> CC: Julien Grall <julien.gr...@arm.com>
>> ---
>> Changes in v2:
>> - Commit message fix (arm64 related change instead of arm)
>> - Add Stefano's reviewed-by
>>
>> Changes in v3:
>> - Added Julien's acked-by
>> ---
>>   xen/arch/arm/arm64/vsysreg.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/xen/arch/arm/arm64/vsysreg.c b/xen/arch/arm/arm64/vsysreg.c
>> index c57ac12503..8f80e1735e 100644
>> --- a/xen/arch/arm/arm64/vsysreg.c
>> +++ b/xen/arch/arm/arm64/vsysreg.c
>> @@ -57,13 +57,14 @@ void do_sysreg(struct cpu_user_regs *regs,
>>        * ARMv8 (DDI 0487A.d): D1-1509 Table D1-58
>>        *
>>        * Unhandled:
>> -     *    OSLSR_EL1
>>        *    DBGPRCR_EL1
>>        */
>>       case HSR_SYSREG_OSLAR_EL1:
>>           return handle_wo_wi(regs, regidx, hsr.sysreg.read, hsr, 1);
>>       case HSR_SYSREG_OSDLR_EL1:
>>           return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1);
>> +    case HSR_SYSREG_OSLSR_EL1:
>> +        return handle_ro_raz(regs, regidx, hsr.sysreg.read, hsr, 1);
>>
>
> Looking at this patch again, OSLM (bit[3] and bit[1]) should be 10 as all
> other values are reserved. So you want to set bit 3 when the guest read it.
>
>
Could you please let me know is my proposal/understanding correct? Instead
of handle_ro_raz, I assume we need this:

        if ( psr_mode_is_user(regs) )
            return inject_undef_exception(regs, hsr);
        if ( hsr.sysreg.read )
            set_user_reg(regs, regidx, 0x8);
        break;

Thanks,
Mirela

Cheers,
>
> --
> Julien Grall
>
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