On 21/02/2024 10:27 am, Jan Beulich wrote:
> EVEX.R' is not ignored in 64-bit code when encoding a GPR or mask
> register. While for mask registers suitable checks are in place (there
> also covering EVEX.R), they were missing for the few cases where in
> EVEX-encoded instructions ModR/M.reg encodes a GPR. While for VPEXTRW
> the bit is replaced before an emulation stub is invoked, for
> VCVT{,T}{S,D,H}2{,U}SI this actually would have led to #UD from inside
> an emulation stub, in turn raising #UD to the guest, but accompanied by
> log messages indicating something's wrong in Xen nevertheless.
>
> Fixes: 001bd91ad864 ("x86emul: support AVX512{F,BW,DQ} extract insns")
> Fixes: baf4a376f550 ("x86emul: support AVX512F legacy-equivalent scalar
> int/FP conversion insns")
> Signed-off-by: Jan Beulich <[email protected]>
Acked-by: Andrew Cooper <[email protected]>
