> On 8 Nov 2024, at 20:00, Ayan Kumar Halder <ayan.kumar.hal...@amd.com> wrote: > > CONFIG_EARLY_UART_SIZE is introduced to let user provide physical size of > early UART. Unlike MMU where we map a page in the virtual address space, > here we need to know the exact physical size to be mapped. > As VA == PA in case of MPU, the memory layout follows exactly the hardware > configuration. As a consequence, we set EARLY_UART_VIRTUAL_ADDRESS as > physical > address. > > Further, we check whether user-defined EARLY_UART_SIZE is aligned to PAGE_SIZE > (4KB). This is partly because we intend to map a minimum of 1 page(ie 4KB) and > the limit address is set as "EARLY_UART_SIZE-1". The limit address needs to > end > with 0x3f (as required by PRLAR register). > > UART is mapped as nGnRE region (as specified by ATTR=100 , refer G1.3.13, > MAIR_EL2, "---0100 Device memory nGnRE") and Doc ID - 102670_0101_02_en > Table 4-3, Armv8 architecture memory types (nGnRE - Corresponds to Device in > Armv7 architecture). Also, it is mapped as outer shareable, RW at EL2 only > and execution of instructions from the region is not permitted. > > Signed-off-by: Ayan Kumar Halder <ayan.kumar.hal...@amd.com> > —
This looks ok to me Reviewed-by: Luca Fancellu <luca.fance...@arm.com>
